1. 13 Nov, 2020 1 commit
    • Alexei Fedorov's avatar
      TSP: Fix GCC 11.0.0 compilation error. · caff3c87
      Alexei Fedorov authored
      
      
      This patch fixes the following compilation error
      reported by aarch64-none-elf-gcc 11.0.0:
      
      bl32/tsp/tsp_main.c: In function 'tsp_smc_handler':
      bl32/tsp/tsp_main.c:393:9: error: 'tsp_get_magic'
       accessing 32 bytes in a region of size 16
       [-Werror=stringop-overflow=]
        393 |         tsp_get_magic(service_args);
            |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~
      bl32/tsp/tsp_main.c:393:9: note: referencing argument 1
       of type 'uint64_t *' {aka 'long long unsigned int *'}
      In file included from bl32/tsp/tsp_main.c:19:
      bl32/tsp/tsp_private.h:64:6: note: in a call to function 'tsp_get_magic'
         64 | void tsp_get_magic(uint64_t args[4]);
            |      ^~~~~~~~~~~~~
      
      by changing declaration of tsp_get_magic function from
      void tsp_get_magic(uint64_t args[4]);
      to
      uint128_t tsp_get_magic(void);
      which returns arguments directly in x0 and x1 registers.
      
      In bl32\tsp\tsp_main.c the current tsp_smc_handler()
      implementation calls tsp_get_magic(service_args);
      , where service_args array is declared as
      uint64_t service_args[2];
      and tsp_get_magic() in bl32\tsp\aarch64\tsp_request.S
      copies only 2 registers in output buffer:
      	/* Store returned arguments to the array */
      	stp	x0, x1, [x4, #0]
      
      Change-Id: Ib34759fc5d7bb803e6c734540d91ea278270b330
      Signed-off-by: default avatarAlexei Fedorov <Alexei.Fedorov@arm.com>
      caff3c87
  2. 04 Jan, 2019 1 commit
    • Antonio Nino Diaz's avatar
      Sanitise includes across codebase · 09d40e0e
      Antonio Nino Diaz authored
      Enforce full include path for includes. Deprecate old paths.
      
      The following folders inside include/lib have been left unchanged:
      
      - include/lib/cpus/${ARCH}
      - include/lib/el3_runtime/${ARCH}
      
      The reason for this change is that having a global namespace for
      includes isn't a good idea. It defeats one of the advantages of having
      folders and it introduces problems that are sometimes subtle (because
      you may not know the header you are actually including if there are two
      of them).
      
      For example, this patch had to be created because two headers were
      called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform
      to avoid collision."). More recently, this patch has had similar
      problems: 46f9b2c3 ("drivers: add tzc380 support").
      
      This problem was introduced in commit 4ecca339
      
       ("Move include and
      source files to logical locations"). At that time, there weren't too
      many headers so it wasn't a real issue. However, time has shown that
      this creates problems.
      
      Platforms that want to preserve the way they include headers may add the
      removed paths to PLAT_INCLUDES, but this is discouraged.
      
      Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      09d40e0e
  3. 03 May, 2017 1 commit
  4. 08 Apr, 2015 1 commit
    • Kévin Petit's avatar
      Add support to indicate size and end of assembly functions · 8b779620
      Kévin Petit authored
      
      
      In order for the symbol table in the ELF file to contain the size of
      functions written in assembly, it is necessary to report it to the
      assembler using the .size directive.
      
      To fulfil the above requirements, this patch introduces an 'endfunc'
      macro which contains the .endfunc and .size directives. It also adds
      a .func directive to the 'func' assembler macro.
      
      The .func/.endfunc have been used so the assembler can fail if
      endfunc is omitted.
      
      Fixes ARM-Software/tf-issues#295
      
      Change-Id: If8cb331b03d7f38fe7e3694d4de26f1075b278fc
      Signed-off-by: default avatarKévin Petit <kevin.petit@arm.com>
      8b779620
  5. 06 May, 2014 1 commit
    • Dan Handley's avatar
      Reduce deep nesting of header files · 97043ac9
      Dan Handley authored
      Reduce the number of header files included from other header
      files as much as possible without splitting the files. Use forward
      declarations where possible. This allows removal of some unnecessary
      "#ifndef __ASSEMBLY__" statements.
      
      Also, review the .c and .S files for which header files really need
      including and reorder the #include statements alphabetically.
      
      Fixes ARM-software/tf-issues#31
      
      Change-Id: Iec92fb976334c77453e010b60bcf56f3be72bd3e
      97043ac9
  6. 26 Mar, 2014 1 commit
    • Andrew Thoelke's avatar
      Place assembler functions in separate sections · 0a30cf54
      Andrew Thoelke authored
      This extends the --gc-sections behaviour to the many assembler
      support functions in the firmware images by placing each function
      into its own code section. This is achieved by creating a 'func'
      macro used to declare each function label.
      
      Fixes ARM-software/tf-issues#80
      
      Change-Id: I301937b630add292d2dec6d2561a7fcfa6fec690
      0a30cf54
  7. 20 Feb, 2014 2 commits
    • Achin Gupta's avatar
      Rework arithmetic operations in Test Secure Payload · 916a2c1e
      Achin Gupta authored
      
      
      This patch reworks the service provided by the TSP to perform common
      arithmetic operations on a set of arguments provided by the non-secure
      world. For a addition, division, subtraction & multiplication operation
      requested on two arguments in x0 and x1 the steps are:
      
      1. TSPD saves the non-secure context and passes the operation and its
         arguments to the TSP.
      
      2. TSP asks the TSPD to return the same arguments once again. This
         exercises an additional SMC path.
      
      3. TSP now has two copies of both x0 and x1. It performs the operation
         on the corresponding copies i.e. in case of addition it returns x0+x0
         and x1+x1.
      
      4. TSPD receives the result, saves the secure context, restores the
         non-secure context and passes the result back to the non-secure
         client.
      
      Change-Id: I6eebfa2ae0a6f28b1d2e11a31f575c7a4b96724b
      Co-authored-by: default avatarJeenu Viswambharan <jeenu.viswambharan@arm.com>
      916a2c1e
    • Achin Gupta's avatar
      Add Test Secure Payload (BL3-2) image · 7c88f3f6
      Achin Gupta authored
      
      
      This patch adds a simple TSP as the BL3-2 image. The secure payload
      executes in S-EL1. It paves the way for the addition of the TSP
      dispatcher runtime service to BL3-1. The TSP and the dispatcher service
      will serve as an example of the runtime firmware's ability to toggle
      execution between the non-secure and secure states in response to SMC
      request from the non-secure state.  The TSP will be replaced by a
      Trusted OS in a real system.
      
      The TSP also exports a set of handlers which should be called in
      response to a PSCI power management event e.g a cpu being suspended or
      turned off. For now it runs out of Secure DRAM on the ARM FVP port and
      will be moved to Secure SRAM later. The default translation table setup
      code assumes that the caller is executing out of secure SRAM. Hence the
      TSP exports its own translation table setup function.
      
      The TSP only services Fast SMCs, is non-reentrant and non-interruptible.
      It does arithmetic operations on two sets of four operands, one set
      supplied by the non-secure client, and the other supplied by the TSP
      dispatcher in EL3. It returns the result according to the Secure Monitor
      Calling convention standard.
      
      This TSP has two functional entry points:
      
      - An initial, one-time entry point through which the TSP is initialized
        and prepares for receiving further requests from secure
        monitor/dispatcher
      
      - A fast SMC service entry point through which the TSP dispatcher
        requests secure services on behalf of the non-secure client
      
      Change-Id: I24377df53399307e2560a025eb2c82ce98ab3931
      Co-authored-by: default avatarJeenu Viswambharan <jeenu.viswambharan@arm.com>
      7c88f3f6
  8. 17 Jan, 2014 2 commits
    • Jeenu Viswambharan's avatar
      Change comments in assembler files to help ctags · 3a4cae05
      Jeenu Viswambharan authored
      Ctags seem to have a problem with generating tags for assembler symbols
      when a comment immediately follows an assembly label.
      
      This patch inserts a single space character between the label
      definition and the following comments to help ctags.
      
      The patch is generated by the command:
      
        git ls-files -- \*.S | xargs sed -i 's/^\([^:]\+\):;/\1: ;/1'
      
      Change-Id: If7a3c9d0f51207ea033cc8b8e1b34acaa0926475
      3a4cae05
    • Dan Handley's avatar
      Update year in copyright text to 2014 · e83b0cad
      Dan Handley authored
      Change-Id: Ic7fb61aabae1d515b9e6baf3dd003807ff42da60
      e83b0cad
  9. 05 Dec, 2013 2 commits
    • Dan Handley's avatar
      Enable third party contributions · ab2d31ed
      Dan Handley authored
      - Add instructions for contributing to ARM Trusted Firmware.
      
      - Update copyright text in all files to acknowledge contributors.
      
      Change-Id: I9311aac81b00c6c167d2f8c889aea403b84450e5
      ab2d31ed
    • Sandrine Bailleux's avatar
      Various improvements/cleanups on the linker scripts · 8d69a03f
      Sandrine Bailleux authored
        - Check at link-time that bootloader images will fit in memory
          at run time and that they won't overlap each other.
        - Remove text and rodata orphan sections.
        - Define new linker symbols to remove the need for platform setup
          code to know the order of sections.
        - Reduce the size of the raw binary images by cutting some sections
          out of the disk image and allocating them at load time, whenever
          possible.
        - Rework alignment constraints on sections.
        - Remove unused linker symbols.
        - Homogenize linker symbols names across all BLs.
        - Add some comments in the linker scripts.
      
      Change-Id: I47a328af0ccc7c8ab47fcc0dc6e7dd26160610b9
      8d69a03f
  10. 27 Nov, 2013 1 commit
  11. 25 Oct, 2013 1 commit