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  1. 24 Oct, 2020 4 commits
  3. 21 Oct, 2020 2 commits
    • Tomas Pilar's avatar
      plat/qemu_sbsa: Remove cortex_a53 and aem_generic · d1ff30d7
      Tomas Pilar authored 
      

The qemu_sbsa platform uses 42bit address size but
the cortex-a53 only supports 40bit addressing, the
cpu is incompatible with the platform.

The aem_generic is also not used with qemu_sbsa, in
fact, the platform currently only properly supports
the cortex-a57 cpu.

Change-Id: I91c92533116f1c3451d01ca99824e91d3d58df14
Signed-off-by: default avatarTomas Pilar <tomas@nuviateam.com>
      d1ff30d7
    • Pali Rohár's avatar
      plat: marvell: armada: Building ${DOIMAGETOOL} is only for a8k · b5e3d540
      Pali Rohár authored 
      

Currently a3k target is misusing ${DOIMAGETOOL} target for building flash
and UART images. It is not used for building image tool.

So move ${DOIMAGETOOL} target from common marvell include file into a8k
include file and add correct invocation of ${MAKE} into a3k for building
flash and UART images.

Part of this change is also checks that MV_DDR_PATH for a3k was specified
by user as this option is required for building a3k flash and UART images.
Signed-off-by: default avatarPali Rohár <pali@kernel.org>
Change-Id: I5ae9d08b8505460933f17836c9b6435fd6e51bb6
      b5e3d540
  5. 20 Oct, 2020 5 commits
  7. 19 Oct, 2020 1 commit
    • Pali Rohár's avatar
      plat: marvell: armada: Fix including plat/marvell/marvell.mk file · 0412b732
      Pali Rohár authored 
      

Include file plat/marvell/marvell.mk for platform A3700 was included two
times. Once from file plat/marvell/armada/a3k/common/a3700_common.mk and
second time from common file plat/marvell/armada/common/marvell_common.mk.

It caused following warning every time was make called:

    plat/marvell/marvell.mk:51: warning: overriding recipe for target 'mrvl_clean'
    plat/marvell/marvell.mk:51: warning: ignoring old recipe for target 'mrvl_clean'

Change in this commit removes inclusion of plat/marvell/marvell.mk file in
common file plat/marvell/armada/common/marvell_common.mk. As a80x0 platform
needs this include file, add it also into a80x0 platform specific include
file lat/marvell/armada/a8k/common/a8k_common.mk.

Also moves inclusion of plat/marvell/marvell.mk file in a3700 platform file
plat/marvell/armada/a3k/common/a3700_common.mk at correct place. Global
plat/marvell/marvell.mk expects that variables DOIMAGEPATH and DOIMAGETOOL
are already defined, but it defines MARVELL_SECURE_BOOT variable which is
needed by plat/marvell/armada/a3k/common/a3700_common.mk.
Signed-off-by: default avatarPali Rohár <pali@kernel.org>
Change-Id: I5cbbd7eb8a3376924419f9850516b2a4924be5aa
      0412b732
  9. 15 Oct, 2020 2 commits
    • Saurabh Gorecha's avatar
      plat:qti Mandate SMC implementaion and bug fix · 4b918452
      Saurabh Gorecha authored 
      

implementation of SMC call SMCCC_ARCH_SOC_ID
adding debugging logs in mem assign call.
Checking range of param in mem_assign call is from CB_MEM_RAM
or CB_MEM_RESERVED.

Change-Id: Iba51bff154df01e02dcb7715582ffaff7beba26e
Signed-off-by: default avatarSaurabh Gorecha <sgorecha@codeaurora.org>
      4b918452
    • Pali Rohár's avatar
      plat: marvell: armada: a3k: When WTP is empty do not define variables and... · c5e1b061
      Pali Rohár authored 
      
plat: marvell: armada: a3k: When WTP is empty do not define variables and targets which depends on it

Some of targets (e.g. mrvl_flash) depends on WTP build option. Other
targets (e.g. fip) can be build also without WTP build option as they do
not depend on it.

This change put all A3720 variables and targets which depends on WTP into
conditional if-endif section, so they are not defined when user has not
supplied WTP build option.

Target mrvl_flash is defined also when WTP was not specified and in this
case it just print error message to help user.

Variables which do not depend on WTP are moved to the top of
a3700_common.mk file.
Signed-off-by: default avatarPali Rohár <pali@kernel.org>
Change-Id: Idb3892233586a0afca3e0e6564279641d2e4b960
      c5e1b061
  11. 13 Oct, 2020 6 commits
  13. 12 Oct, 2020 3 commits
    • Jimmy Brisson's avatar
      Increase type widths to satisfy width requirements · d7b5f408
      Jimmy Brisson authored 
      

Usually, C has no problem up-converting types to larger bit sizes. MISRA
rule 10.7 requires that you not do this, or be very explicit about this.
This resolves the following required rule:

    bl1/aarch64/bl1_context_mgmt.c:81:[MISRA C-2012 Rule 10.7 (required)]<None>
    The width of the composite expression "0U | ((mode & 3U) << 2U) | 1U |
    0x3c0U" (32 bits) is less that the right hand operand
    "18446744073709547519ULL" (64 bits).

This also resolves MISRA defects such as:

    bl2/aarch64/bl2arch_setup.c:18:[MISRA C-2012 Rule 12.2 (required)]
    In the expression "3U << 20", shifting more than 7 bits, the number
    of bits in the essential type of the left expression, "3U", is
    not allowed.

Further, MISRA requires that all shifts don't overflow. The definition of
PAGE_SIZE was (1U << 12), and 1U is 8 bits. This caused about 50 issues.
This fixes the violation by changing the definition to 1UL << 12. Since
this uses 32bits, it should not create any issues for aarch32.

This patch also contains a fix for a build failure in the sun50i_a64
platform. Specifically, these misra fixes removed a single and
instruction,

    92407e73        and     x19, x19, #0xffffffff

from the cm_setup_context function caused a relocation in
psci_cpus_on_start to require a linker-generated stub. This increased the
size of the .text section and caused an alignment later on to go over a
page boundary and round up to the end of RAM before placing the .data
section. This sectionn is of non-zero size and therefore causes a link
error.

The fix included in this reorders the functions during link time
without changing their ording with respect to alignment.

Change-Id: I76b4b662c3d262296728a8b9aab7a33b02087f16
Signed-off-by: default avatarJimmy Brisson <jimmy.brisson@arm.com>
      d7b5f408
    • Manish V Badarkhe's avatar
      plat: brcm: Remove 'AARCH32' deprecated macro · 0e16177e
      Manish V Badarkhe authored 
      

Removed 'AARCH32' deprecated macro from 'stingray'
Broadcom platform code.

Change-Id: If8d9e785b7980fefd39df06547fcf71b899fd735
Signed-off-by: default avatarManish V Badarkhe <Manish.Badarkhe@arm.com>
      0e16177e
    • Manish V Badarkhe's avatar
      Remove deprecated macro from TF-A code · c959ea78
      Manish V Badarkhe authored 
      

Removed '__ASSEMBLY__' deprecated macro from TF-A code

Change-Id: I9082a568b695acb5b903f509db11c8672b62d9d0
Signed-off-by: default avatarManish V Badarkhe <Manish.Badarkhe@arm.com>
      c959ea78
  15. 09 Oct, 2020 7 commits
  17. 06 Oct, 2020 1 commit
    • Usama Arif's avatar
      plat/arm: common: add guard for arm_get_rotpk_info_regs · 3bfcc9d7
      Usama Arif authored 
      

Only define arm_get_rotpk_info_regs if ROTPK is in registers,
i.e. (ARM_ROTPK_LOCATION_ID == ARM_ROTPK_REGS_ID). This will
allow platform build without definition of TZ_PUB_KEY_HASH_BASE
if dedicated registers for ROTPK are not available on the platform.

Change-Id: I74ee2d5007f5d876a031a1efca20ebee2dede0c7
Signed-off-by: default avatarUsama Arif <usama.arif@arm.com>
      3bfcc9d7
  19. 05 Oct, 2020 2 commits
  21. 04 Oct, 2020 5 commits
  23. 02 Oct, 2020 1 commit
  25. 29 Sep, 2020 1 commit
    • Andre Przywara's avatar
      arm_fpga: Add post-build linker script · 01301b11
      Andre Przywara authored 
      

For the Arm Ltd. FPGAs to run, we need to load several payloads into the
FPGA's memory:
- Some trampoline code at address 0x0, to jump to BL31's entry point.
- The actual BL31 binary at the beginning of DRAM.
- The (generic) DTB image to describe the hardware.
- The actual non-secure payloads (kernel, ramdisks, ...)

The latter is application specific, but the first three blobs are rather
generic.
Since the uploader tool supports ELF binaries, it seems helpful to
combine these three images into one .axf file, as this also simplifies
the command line.

Add a post-build linker script, that combines those three bits into one
ELF file, together with their specific load addresses.
Include a call to "ld" with this linker script in the platform Makefile,
so it will be build automatically. The result will be called "bl31.axf".

Change-Id: I4a90da16fa1e0e83b51d19e5b1daf61f5a0bbfca
Signed-off-by: default avatarAndre Przywara <andre.przywara@arm.com>
      01301b11