1. 24 Jul, 2019 1 commit
    • Julius Werner's avatar
      plat/rockchip: Switch to use new common BL aux parameter library · c1185ffd
      Julius Werner authored
      
      
      This patch changes all Rockchip platforms to use the new common BL aux
      parameter helpers. Since the parameter space is now cleanly split in
      generic and vendor-specific parameters and the COREBOOT_TABLE
      parameter is now generic, the parameter type number for that parameter
      has to change. Since it only affects coreboot which always builds TF as
      a submodule and includes its headers directly to get these constants,
      this should not cause any issues. In general, after this point, we
      should avoid changing already assigned parameter type numbers whenever
      possible.
      
      Change-Id: Ic99ddd1e91ff5e5fe212fa30c793a0b8394c9dad
      Signed-off-by: default avatarJulius Werner <jwerner@chromium.org>
      c1185ffd
  2. 08 Nov, 2018 1 commit
    • Antonio Nino Diaz's avatar
      Standardise header guards across codebase · c3cf06f1
      Antonio Nino Diaz authored
      
      
      All identifiers, regardless of use, that start with two underscores are
      reserved. This means they can't be used in header guards.
      
      The style that this project is now to use the full name of the file in
      capital letters followed by 'H'. For example, for a file called
      "uart_example.h", the header guard is UART_EXAMPLE_H.
      
      The exceptions are files that are imported from other projects:
      
      - CryptoCell driver
      - dt-bindings folders
      - zlib headers
      
      Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      c3cf06f1
  3. 24 Jan, 2018 1 commit
  4. 03 May, 2017 1 commit
  5. 24 Feb, 2017 1 commit
  6. 26 Oct, 2016 2 commits
  7. 09 Sep, 2016 1 commit
    • Caesar Wang's avatar
      rockchip: set gpio2 ~ gpio4 to input and pull none mode · 2bff35bb
      Caesar Wang authored
      For save power cosumption, if gpio power supply shut down, we need to
      set gpio2 ~ gpio4 to input and HiZ status when suspend, and recovery
      they status when rusume. we do it base on apio pass from loader.
      
      Change-Id: I59fd2395e5e37e63425472a39f519822c9197e4c
      2bff35bb
  8. 25 Aug, 2016 1 commit
    • Caesar Wang's avatar
      rockchip: on rk3399 enable Schmitt trigger on 32 kHz clock · 9d5aee2b
      Caesar Wang authored
      If we don't enable the Schmitt trigger on the 32 kHz clock then systems
      won't always resume from suspend properly.  Presumably anything else in
      the system that relies on the 32 kHz clock also will have problems
      without the Schmitt trigger enabled.
      
      Enable it always since having the 32 kHz clock on GPIO0_A0 isn't
      exactly an optional feature, so all boards using rk3399 will need this.
      
      Change-Id: Idc18c6cd1adc5be5f60efd9cb805d83d5cd40129
      9d5aee2b
  9. 11 Aug, 2016 1 commit
    • Caesar Wang's avatar
      rockchip: update to handle PWMs for rk3399 · 5d3b1067
      Caesar Wang authored
      This patch updates some things for rk3399, as following:
      
      1) Add the new file to handle the pwm. (e.g. the pwm regulator)
      Make sure that good deal with the pwm related things.
      Also, remove some pwm setting for pmu.c.
      
      2) Set the plls slow mode and bypass in suspend, and restore them.
      
      Change-Id: I112806700bf433c87763aac23d22fa7e6a7f5264
      5d3b1067
  10. 28 Jul, 2016 1 commit
    • Caesar Wang's avatar
      rockchip: fixes typo and some bugs for suspend/resume tests · e6517abd
      Caesar Wang authored
      1. Remove the AP_PWROFF in ATF, should configure it in kernel.
      2. Save and restore the PWMs pin/regs for suspend/resume.
      3. The pmusgrf reset-hold bits needs to be released. since the
         pmusgrf reset-hold bits needs to be held.
      4. Configure the PMU power up/down cycles about delay 3ms.
      5. With the MMIO register block as one big mapping.
      6. Fix the build error with psci_entrypoint since PSCI lib updated.
      
      Fixes the commit
      9ec78bdf ("rockchip: support the suspend/resume for rk3399").
      
      Change-Id: I112806700bf433c87763aac23d22fa7e6a7f5264
      e6517abd
  11. 18 Jul, 2016 1 commit
    • Tony Xie's avatar
      rockchip: support the suspend/resume for rk3399 · 9ec78bdf
      Tony Xie authored
      1.Fixes the suspend/resume some bugs.
      2.Add the power domain for saving power consumption.
      3.Add cpu clusters suspend for rk3399 SoCs
      
      Change-Id: Id602779016b41d6281f4ba40a20229d909b28e46
      9ec78bdf
  12. 27 May, 2016 1 commit
  13. 04 May, 2016 1 commit
  14. 05 Apr, 2016 1 commit
    • Tony Xie's avatar
      Support for Rockchip's family SoCs · 6fba6e04
      Tony Xie authored
      
      
      This patch adds to support the RK3368 and RK3399 SoCs.
      
      RK3368/RK3399 is one of the Rockchip family SoCs, which is an
      multi-cores ARM SoCs.
      
      This patch adds support to boot the Trusted Firmware on RK3368/RK3399
      SoCs, and adds support to boot secondary CPUs, enter/exit core
      power states for all CPUs in the slow/fast clusters.
      
      This is the initial version for rockchip SoCs.(RK3368/RK3399 and next SoCs)
      * Support arm gicv2 & gicv3.
      * Boot up multi-cores CPU.
      * Add generic CPU helper functions.
      * Support suspend/resume.
      * Add system_off & system_reset implementation.
      * Add delay timer platform implementation.
      * Support the new porting interface for the PSCI implementation.
      
      Change-Id: I704bb3532d65e8c70dbd99b512c5e6e440ea6f43
      Signed-off-by: default avatarTony Xie <tony.xie@rock-chips.com>
      Signed-off-by: default avatarCaesar Wang <wxt@rock-chips.com>
      Signed-off-by: default avatarShengfei xu <xsf@rock-chips.com>
      6fba6e04