- 03 Feb, 2021 4 commits
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Lauren Wehrmeister authored
* changes: plat/arm/board: enable AMU for RD-N2 plat/arm/board: enable AMU for RD-V1 plat/arm/sgi: allow all PSCI callbacks on RD-V1
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Manish Pandey authored
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Manish Pandey authored
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Avinash Mehta authored
Increase the core count and add respective entries in DTS. Add Klein assembly file to cpu sources for core initialization. Add SCMI entries for cores. Signed-off-by: Avinash Mehta <avinash.mehta@arm.com> Change-Id: I14dc1d87df6dcc8d560ade833ce1f92507054747
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- 02 Feb, 2021 10 commits
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Zelalem authored
When building TF-A with USE_ROMLIB=1 and -j make options, the build fails with the following error: make[1]: *** No rule to make target '/build/juno/debug/romlib/romlib.bin', needed by 'bl1_romlib.bin'. This patch fixes that issue. Signed-off-by: Zelalem <zelalem.aweke@arm.com> Change-Id: I0cca416f3f50f400759164e0735c2d6b520ebf84
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Madhukar Pappireddy authored
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Manish Pandey authored
* changes: docs: marvell: Replace ESPRESSObin-Ultra TF-A build example by full example how to build production release of Marvell firmware image docs: marvell: Fix description of flash-image.bin image docs: marvell: Add information into CLOCKSPRESET option how to identify CPU frequency docs: marvell: Reformat DDR_TOPOLOGY option and mention EspressoBin-Ultra board docs: marvell: Move Supported Marvell platforms to PLAT build option
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Manish Pandey authored
* changes: plat: marvell: armada: a3k: Do not use 'echo -e' in Makefile docs: marvell: Update info about BOOTDEV=SATA
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Manish Pandey authored
* changes: docs: marvell: Update info about WTMI_IMG option plat: marvell: armada: a3k: Remove unused variable WTMI_SYSINIT_IMG from Makefile plat: marvell: armada: Show informative build messages and blank lines plat: marvell: armada: Move definition of mrvl_flash target to common marvell_common.mk file plat: marvell: armada: a3k: Use $(Q) instead of @ plat: marvell: armada: a3k: Add a new target mrvl_uart which builds UART image plat: marvell: armada: a3k: Build UART image files directly in $(BUILD_UART) subdirectory plat: marvell: armada: a3k: Build intermediate files in $(BUILD_PLAT) directory plat: marvell: armada: a3k: Correctly set DDR_TOPOLOGY and CLOCKSPRESET for WTMI plat: marvell: armada: a3k: Allow use of the system Crypto++ library docs: marvell: Update info about WTP and MV_DDR_PATH parameters plat: marvell: armada: a3k: Add checks that WTP, MV_DDR_PATH and CRYPTOPP_PATH are correctly defined docs: marvell: Update mv-ddr-marvell and A3700-utils-marvell branches
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Pali Rohár authored
docs: marvell: Replace ESPRESSObin-Ultra TF-A build example by full example how to build production release of Marvell firmware image ESPRESSObin-Ultra TF-A build example was now just a copy+paste of previous mentioned example. It produced debug binary with custom log level, which was not described. So rather replace this duplicate build example by a full example with all steps how to build production release of Marvell firmware image for EspressoBin with 1GHz CPU and 1GB DDR4 RAM. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: Ief1b8bc96a3035ebd8421bd68dca5eb5c8d8fd52
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Pali Rohár authored
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I192acab2a7f42cd80069faeac2d7823a05558dc6
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Pali Rohár authored
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I5310c30051703bbf9f377762a00eb6a8188c6fa1
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Pali Rohár authored
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I96c2d9d5bc6c69a1a66a29bf586a23375d63ab5a
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Pali Rohár authored
Reformat list of boards, remove unsupported OcteonTX2 and mention supported Turris MOX board. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I22cea7f77fd078554c7f0ed4108781626209e563
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- 30 Jan, 2021 1 commit
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André Przywara authored
* changes: allwinner: Leave CPU power alone during BL31 setup allwinner: psci: Invert check in .validate_ns_entrypoint allwinner: psci: Drop MPIDR check from .pwr_domain_on allwinner: psci: Drop .get_node_hw_state callback
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- 29 Jan, 2021 16 commits
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Pranav Madhu authored
AMU counters are used for monitoring the CPU performance. RD-N2 platform has architected AMU available for each core. Enable the use of AMU by non-secure OS for supporting the use of counters for processor performance control (ACPI CPPC). Change-Id: I5cc749cf63c18fc5c7563dd754c2f42990a97e23 Signed-off-by: Pranav Madhu <pranav.madhu@arm.com>
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Pranav Madhu authored
AMU counters are used for monitoring the CPU performance. RD-V1 platform has architected AMU available for each core. Enable the use of AMU by non-secure OS for supporting the use of counters for processor performance control (ACPI CPPC). Change-Id: I4003d21407953f65b3ce99eaa8f496d6052546e0 Signed-off-by: Pranav Madhu <pranav.madhu@arm.com>
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Pranav Madhu authored
Some of the PSCI platform callbacks were restricted on RD-V1 platform because the idle was not functional. Now that it is functional, remove all the restrictions on the use PSCI platform callbacks. Change-Id: I4cb97cb54de7ee166c30f28df8fea653b6b425c7 Signed-off-by: Pranav Madhu <pranav.madhu@arm.com>
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Pali Rohár authored
It does not have to be supported by the current shell used in Makefile. Replace it by a simple echo with implicit newline. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I97fe44986ac36d3079d5258c67f0c9184537e7f0
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Pali Rohár authored
Default WTMI_IMG value was documented incorrectly. Also WTMI_IMG name may be misleading as this option does not specify full WTMI image, just a main loop (e.g. fuse.bin or custom RTOS image) without hardware initialization code (DDR, CPU and clocks). Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I3de4a27ce2165b962fa628c992fd8f80151efd7c
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Pali Rohár authored
Information is taken from the post https://lists.denx.de/pipermail/u-boot/2017-July/299351.html Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I5f608e135ec56685a3e2b986a52670540d48a4bf
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Pali Rohár authored
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I322c8aa65437abb61385f58b700a06b3e2e22e4f
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Pali Rohár authored
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: Ibc15db07c581eca29c1b1fbfb145cee50dc42605
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Pali Rohár authored
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: If545b3812787cc97b95dbd61ed51c37d30c5d412
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Pali Rohár authored
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I09fd734510ec7019505263ff0ea381fab36944fa
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Pali Rohár authored
This change separates building of flash and UART images, so it is possible to build only one of these images. Also this change allows make to build them in parallel. Target mrvl_flash now builds only flash image and mrvl_uart only UART image. This change reflects it also in the documentation. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: Ie9ce4538d52188dd26d99dfeeb5ad171a5b818f3
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Pali Rohár authored
This removes need to move files and also allows to build uart and flash images in parallel. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I13bea547d7849615e1c1e11d333c8c99e568d3f6
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Pali Rohár authored
Currently a3700_common.mk makefile builds intermediate files in TF-A top level directory and also outside of the TF-A tree. This change fixes this issue and builds all intermediate files in $(BUILD_PLAT) directory. Part of this change is also removal of 'rm' and 'mv' commands as there is no need to remove or move intermediate files from outside of the TF-A build tree. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I72e3a3024bd3fdba1b991a220184d750029491e9
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Pali Rohár authored
When building WTMI image we need to correctly set DDR_TOPOLOGY and CLOCKSPRESET variables which WTMI build system expect. Otherwise it use default values. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: Ib83002194c8a6c64a2014899ac049bd319e1652f
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Pali Rohár authored
This change introduces two new A3720 parameters, CRYPTOPP_LIBDIR and CRYPTOPP_INCDIR, which can be used to specify directory paths to pre-compiled Crypto++ library and header files. When both new parameters are specified then the source code of Crypto++ via CRYPTOPP_PATH parameter is not needed. And therefore it allows TF-A build process to use system Crypto++ library. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I6d440f86153373b11b8d098bb68eb7325e86b20b
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Madhukar Pappireddy authored
For SoCs which do not implement RAS, use DSB as a barrier to synchronize pending external aborts at the entry and exit of exception handlers. This is needed to isolate the SErrors to appropriate context. However, this introduces an unintended side effect as discussed in the https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/3440 A summary of the side effect and a quick workaround is provided as part of this patch and summarized here: The explicit DSB at the entry of various exception vectors in BL31 for handling exceptions from lower ELs can inadvertently trigger an SError exception in EL3 due to pending asyncrhonouus aborts in lower ELs. This will end up being handled by serror_sp_elx in EL3 which will ultimately panic and die. The way to workaround is to update a flag to indicate if the exception truly came from EL3. This flag is allocated in the cpu_context structure. This is not a bullet proof solution to the problem at hand because we assume the instructions following "isb" that help to update the flag (lines 100-102 & 139-141) execute without causing further exceptions. Change-Id: I4d345b07d746a727459435ddd6abb37fda24a9bf Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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- 28 Jan, 2021 4 commits
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Sandrine Bailleux authored
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André Przywara authored
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Pali Rohár authored
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: Id5e36b7ba3a840cb3598c580e806b52d8e8dd70f
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Pali Rohár authored
plat: marvell: armada: a3k: Add checks that WTP, MV_DDR_PATH and CRYPTOPP_PATH are correctly defined These variables must contain a path to a valid directory (not a file) which really exists. Also WTP and MV_DDR_PATH must point to either a valid Marvell release tarball or git repository. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I1ad80c41092cf3ea6a625426df62b7d9d6f37815
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- 27 Jan, 2021 5 commits
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Lauren Wehrmeister authored
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Nikos Nikoleris authored
The value of stdout-path is a string and as a result, we can't use a label as a reference to the serial0 node. This change fixes the stdout-path property for N1SDP, Morello and TC0 by pointing to the right alias. Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Change-Id: I3d403389a424569be56327fab4140fec06f96d37
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Madhukar Pappireddy authored
* changes: doc: maintainers: add scmi server drivers: move scmi-msg out of st
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Jimmy Brisson authored
This bug manifests itself as a segfault triggered by a double-free. I noticed that right before the double-free, the sk list contained 2 elements with the same address. (gdb) p sk_X509_EXTENSION_value(sk, 1) $34 = (X509_EXTENSION *) 0x431ad0 (gdb) p sk_X509_EXTENSION_value(sk, 0) $35 = (X509_EXTENSION *) 0x431ad0 (gdb) p sk_X509_EXTENSION_num(sk) $36 = 2 This caused confusion; this should never happen. I figured that this was caused by a ext_new_xxxx function freeing something before it is added to the list, so I put a breakpoint on each of them to step through. I was suprised to find that none of my breakpoints triggered for the second element of the iteration through the outer loop just before the double-free. Looking through the code, I noticed that it's possible to avoid doing a ext_new_xxxx, when either: * ext->type == NVCOUNTER and ext->arg == NULL * ext->type == HASH and ext->arg == NULL and ext->optional == false So I put a breakpoint on both. It turns out that it was the HASH version, but I added a fix for both. The fix for the Hash case is simple, as it was a mistake. The fix for the NVCOUNTER case, however, is a bit more subtle. The NVCOUNTER may be optional, and when it's optional we can skip it. The other case, when the NVCOUNTER is required (not optinal), the `check_cmd_params` function has already verified that the `ext->arg` must be non-NULL. We assert that before processing it to covert any possible segfaults into more descriptive errors. This should no longer cause double-frees by adding the same ext twice. Change-Id: Idae2a24ecd964b0a3929e6193c7f85ec769f6470 Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>
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Manish V Badarkhe authored
The certification tool creates all the certificates mentioned statically in the code rather than taking explicit certificate requests from the command line parameters. Code is optimized to avoid unnecessary attempts to create non-requested certificates. Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: I78feac25bc701bf8f08c6aa5a2e1590bec92d0f2
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