1. 19 Apr, 2021 2 commits
    • Chris Kay's avatar
      build(hooks): add commitlint hook · d97bade1
      Chris Kay authored
      
      
      This change adds a configuration for commitlint - a tool designed to
      enforce a particular commit message style - and run it as part of Git's
      commit-msg hook. This validates commits immediately after the editor has
      been exited, and the configuration is derived from the configuration we
      provide to Commitizen.
      
      While the configuration provided suggests a maximum header and body
      length, neither of these are hard errors. This is to accommodate the
      occasional commit where it may be difficult or impossible to comply
      with the length requirements (for example, with a particularly long
      scope, or a long URL in the message body).
      
      Change-Id: Ib5e90472fd1f1da9c2bff47703c9682232ee5679
      Signed-off-by: default avatarChris Kay <chris.kay@arm.com>
      d97bade1
    • Chris Kay's avatar
      build(hooks): add Husky configuration · ba39362f
      Chris Kay authored
      
      
      Husky is a tool for managing Git hooks within the repository itself.
      Traditionally, commit hooks need to be manually installed on a per-user
      basis, but Husky allows us to install these hooks either automatically
      when `npm install` is invoked within the repository, or manually with
      `npx husky install`.
      
      This will become useful for us in the next few patches when we begin
      introducing tools for enforcing a commit message style.
      
      Change-Id: I64cae147e9ea910347416cfe0bcc4652ec9b4830
      Signed-off-by: default avatarChris Kay <chris.kay@arm.com>
      ba39362f
  2. 14 Apr, 2021 1 commit
  3. 06 Apr, 2021 1 commit
  4. 01 Apr, 2021 3 commits
  5. 25 Mar, 2021 2 commits
    • Andre Przywara's avatar
      allwinner: Add Allwinner H616 SoC support · 26123ca3
      Andre Przywara authored
      
      
      The new Allwinner H616 SoC lacks the management controller and the secure
      SRAM A2, so we need to tweak the memory map quite substantially:
      We run BL31 in DRAM. Since the DRAM starts at 1GB, we cannot use our
      compressed virtual address space (max 256MB) anymore, so we revert to
      the full 32bit VA space and use a flat mapping throughout all of it.
      
      The missing controller also means we need to always use the native PSCI
      ops, using the CPUIDLE hardware, as SCPI and suspend depend on the ARISC.
      
      Change-Id: I77169b452cb7f5dc2ef734f3fc6e5d931749141d
      Signed-off-by: default avatarAndre Przywara <andre.przywara@arm.com>
      26123ca3
    • Andre Przywara's avatar
      doc: allwinner: Reorder sections, document memory mapping · fe90f9ae
      Andre Przywara authored
      
      
      Update the Allwinner platform documentation.
      Reorder the section, to have the build instructions first, followed by
      hints about the installation.
      
      Add some ASCII art about the layout of our virtual memory map, which
      uses a non-trivial condensed virtual address space.
      
      Change-Id: Iaaa79b4366012394e15e4c1b26c212b5efb6ed6a
      Signed-off-by: default avatarAndre Przywara <andre.przywara@arm.com>
      fe90f9ae
  6. 11 Mar, 2021 2 commits
  7. 01 Mar, 2021 1 commit
  8. 25 Feb, 2021 1 commit
  9. 16 Feb, 2021 1 commit
  10. 09 Feb, 2021 1 commit
  11. 05 Feb, 2021 1 commit
  12. 02 Feb, 2021 5 commits
  13. 29 Jan, 2021 4 commits
  14. 28 Jan, 2021 1 commit
  15. 26 Jan, 2021 1 commit
  16. 25 Jan, 2021 1 commit
  17. 21 Jan, 2021 1 commit
  18. 14 Jan, 2021 1 commit
  19. 13 Jan, 2021 6 commits
  20. 12 Jan, 2021 1 commit
  21. 05 Jan, 2021 1 commit
    • Marek Behún's avatar
      plat: marvell: armada: a3k: support doing system reset via CM3 secure coprocessor · d9243f26
      Marek Behún authored
      
      
      Introduce a new build option CM3_SYSTEM_RESET for A3700 platform, which,
      when enabled, adds code to the PSCI reset handler to try to do system
      reset by the WTMI firmware running on the Cortex-M3 secure coprocessor.
      (This function is exposed via the mailbox interface.)
      
      The reason is that the Turris MOX board has a HW bug which causes reset
      to hang unpredictably. This issue can be solved by putting the board in
      a specific state before reset.
      Signed-off-by: default avatarMarek Behún <marek.behun@nic.cz>
      Change-Id: I3f60b9f244f334adcd33d6db6a361fbc8b8d209f
      d9243f26
  22. 23 Dec, 2020 1 commit
  23. 18 Dec, 2020 1 commit