1. 01 Feb, 2016 8 commits
    • danh-arm's avatar
      Merge pull request #511 from soby-mathew/sm/psci_on_race_v2 · dbc80717
      danh-arm authored
      Fix PSCI CPU ON race when setting state to ON_PENDING
      dbc80717
    • danh-arm's avatar
      Merge pull request #508 from soby-mathew/sm/debug_xlat · 1a3986a4
      danh-arm authored
      Use tf_printf() for debug logs from xlat_tables.c
      1a3986a4
    • danh-arm's avatar
      Merge pull request #504 from sandrine-bailleux/sb/fix-doc-mmap · 9f89feb9
      danh-arm authored
      Porting Guide: Clarify identity-mapping requirement
      9f89feb9
    • danh-arm's avatar
      Merge pull request #503 from sandrine-bailleux/sb/clarify-doc-el3-payloads · 6874e723
      danh-arm authored
      Clarify EL3 payload documentation
      6874e723
    • danh-arm's avatar
      Merge pull request #501 from jcastillo-arm/jc/tf-issues/300 · 51b57481
      danh-arm authored
      Disable PL011 UART before configuring it
      51b57481
    • Soby Mathew's avatar
      Fix PSCI CPU ON race when setting state to ON_PENDING · 203cdfe2
      Soby Mathew authored
      When a CPU is powered down using PSCI CPU OFF API, it disables its caches
      and updates its `aff_info_state` to OFF. The corresponding cache line is
      invalidated by the CPU so that the update will be observed by other CPUs
      running with caches enabled. There is a possibility that another CPU
      which has been trying to turn ON this CPU via PSCI CPU ON API,
      has already seen the update to `aff_info_state` and proceeds to update
      the state to ON_PENDING prior to the cache invalidation. This may result
      in the update of the state to ON_PENDING being discarded.
      
      This patch fixes this issue by making sure that the update of `aff_info_state`
      to ON_PENDING sticks by reading back the value after the cache flush and
      retrying it if not updated. The patch also adds a dsbish() to
      `psci_do_cpu_off()` to ensure ordering of the update to `aff_info_state`
      prior to cache line invalidation.
      
      Fixes ARM-software/tf-issues#349
      
      Change-Id: I225de99957fe89871f8c57bcfc243956e805dcca
      203cdfe2
    • danh-arm's avatar
      Merge pull request #497 from mtk09422/spm-v3 · 7b46d0d8
      danh-arm authored
      update SPM/DCM/MTCMOS related code for power control logic
      7b46d0d8
    • Soby Mathew's avatar
      Use tf_printf() for debug logs from xlat_tables.c · d30ac1c3
      Soby Mathew authored
      The debug prints used to debug translation table setup in xlat_tables.c
      used the `printf()` standard library function instead of the stack
      optimized `tf_printf()` API. DEBUG_XLAT_TABLE option was used to enable
      debug logs within xlat_tables.c and it configured a much larger stack
      size for the platform in case it was enabled. This patch modifies these
      debug prints within xlat_tables.c to use tf_printf() and modifies the format
      specifiers to be compatible with tf_printf(). The debug prints are now enabled
      if the VERBOSE prints are enabled in Trusted Firmware via LOG_LEVEL build
      option.
      
      The much larger stack size definition when DEBUG_XLAT_TABLE is defined
      is no longer required and the platform ports are modified to remove this
      stack size definition.
      
      Change-Id: I2f7d77ea12a04b827fa15e2adc3125b1175e4c23
      d30ac1c3
  2. 29 Jan, 2016 2 commits
    • Sandrine Bailleux's avatar
      Porting Guide: Clarify identity-mapping requirement · ef7fb9e4
      Sandrine Bailleux authored
      The memory translation library in Trusted Firmware supports
      non-identity mappings for Physical to Virtual addresses since commit
      f984ce84. However, the porting guide hasn't been updated
      accordingly and still mandates the platform ports to use
      identity-mapped page tables for all addresses.
      
      This patch removes this out-dated information from the Porting Guide
      and clarifies in which circumstances non-identity mapping may safely
      be used.
      
      Fixes ARM-software/tf-issues#258
      
      Change-Id: I84dab9f3cabfc43794951b1828bfecb13049f706
      ef7fb9e4
    • Sandrine Bailleux's avatar
      Clarify EL3 payload documentation · 143fbef4
      Sandrine Bailleux authored
      This patch reworks the section about booting an EL3 payload in the
      User Guide:
      
       - Centralize all EL3 payload related information in the same
         section.
      
       - Mention the possibility to program the EL3 payload in flash memory
         and execute it in place.
      
       - Provide model parameters for both the Base and Foundation FVPs.
      
       - Provide some guidance to boot an EL3 payload on Juno.
      
      Change-Id: I975c8de6b9b54ff4de01a1154cba63271d709912
      143fbef4
  3. 26 Jan, 2016 7 commits
  4. 25 Jan, 2016 2 commits
  5. 21 Jan, 2016 1 commit
    • Juan Castillo's avatar
      Disable PL011 UART before configuring it · 9400b40e
      Juan Castillo authored
      The PL011 TRM (ARM DDI 0183G) specifies that the UART must be
      disabled before any of the control registers are programmed. The
      PL011 driver included in TF does not disable the UART, so the
      initialization in BL2 and BL31 is violating this requirement
      (and potentially in BL1 if the UART is enabled after reset).
      
      This patch modifies the initialization function in the PL011
      console driver to disable the UART before programming the
      control registers.
      
      Register clobber list and documentation updated.
      
      Fixes ARM-software/tf-issues#300
      
      Change-Id: I839b2d681d48b03f821ac53663a6a78e8b30a1a1
      9400b40e
  6. 20 Jan, 2016 2 commits
  7. 18 Jan, 2016 2 commits
  8. 15 Jan, 2016 3 commits
  9. 14 Jan, 2016 4 commits
  10. 13 Jan, 2016 9 commits