1. 18 Jun, 2015 1 commit
    • Ryan Harkin's avatar
      FVP: Add SP804 delay timer · b49b3221
      Ryan Harkin authored
      
      
      Add SP804 delay timer support to the FVP BSP.
      
      This commit simply provides the 3 constants needed by the SP804
      delay timer driver and calls sp804_timer_init() in
      bl2_platform_setup(). The BSP does not currently use the delay
      timer functions.
      
      Note that the FVP SP804 is a normal world accessible peripheral
      and should not be used by the secure world after transition
      to the normal world.
      
      Change-Id: I5f91d2ac9eb336fd81943b3bb388860dfb5f2b39
      Co-authored-by: default avatarDan Handley <dan.handley@arm.com>
      b49b3221
  2. 09 Jun, 2015 1 commit
    • Sandrine Bailleux's avatar
      CSS: Remove the constants MHU_SECURE_BASE/SIZE · fe55612b
      Sandrine Bailleux authored
      For CSS based platforms, the constants MHU_SECURE_BASE and
      MHU_SECURE_SIZE used to define the extents of the Trusted Mailboxes.
      As such, they were misnamed because the mailboxes are completely
      unrelated to the MHU hardware.
      
      This patch removes the MHU_SECURE_BASE and MHU_SECURE_SIZE #defines.
      The address of the Trusted Mailboxes is now relative to the base of
      the Trusted SRAM.
      
      This patch also introduces a new constant, SCP_COM_SHARED_MEM_BASE,
      which is the address of the first memory region used for communication
      between AP and SCP. This is used by the BOM and SCPI protocols.
      
      Change-Id: Ib200f057b19816bf05e834d111271c3ea777291f
      fe55612b
  3. 04 Jun, 2015 1 commit
    • Sandrine Bailleux's avatar
      Remove FIRST_RESET_HANDLER_CALL build option · 452b7fa2
      Sandrine Bailleux authored
      This patch removes the FIRST_RESET_HANDLER_CALL build flag and its
      use in ARM development platforms. If a different reset handling
      behavior is required between the first and subsequent invocations
      of the reset handling code, this should be detected at runtime.
      
      On Juno, the platform reset handler is now always compiled in.
      This means it is now executed twice on the cold boot path, first in
      BL1 then in BL3-1, and it has the same behavior in both cases. It is
      also executed twice on the warm boot path, first in BL1 then in the
      PSCI entrypoint code.
      
      Also update the documentation to reflect this change.
      
      NOTE: THIS PATCH MAY FORCE PLATFORM PORTS THAT USE THE
      FIRST_RESET_HANDLER_CALL BUILD OPTION TO FIX THEIR RESET HANDLER.
      
      Change-Id: Ie5c17dbbd0932f5fa3b446efc6e590798a5beae2
      452b7fa2
  4. 03 Jun, 2015 1 commit
  5. 01 Jun, 2015 1 commit
    • Sandrine Bailleux's avatar
      Always enable CCI coherency in BL3-1 · a6695275
      Sandrine Bailleux authored
      On ARM standard platforms, snoop and DVM requests used to be enabled
      for the primary CPU's cluster only in the first EL3 bootloader.
      In other words, if the platform reset into BL1 then CCI coherency
      would be enabled by BL1 only, and not by BL3-1 again.
      
      However, this doesn't cater for platforms that use BL3-1 along with
      a non-TF ROM bootloader that doesn't enable snoop and DVM requests.
      In this case, CCI coherency is never enabled.
      
      This patch modifies the function bl31_early_platform_setup() on
      ARM standard platforms so that it always enables snoop and DVM
      requests regardless of whether earlier bootloader stages have
      already done it. There is no harm in executing this code twice.
      
      ARM Trusted Firmware Design document updated accordingly.
      
      Change-Id: Idf1bdeb24d2e1947adfbb76a509f10beef224e1c
      a6695275
  6. 27 May, 2015 1 commit
  7. 19 May, 2015 1 commit
    • Dan Handley's avatar
      Fix return type of FVP plat_arm_topology_setup · 12ad4d88
      Dan Handley authored
      Fix the return type of the FVP `plat_arm_topology_setup` function
      to be `void` instead of `int` to match the declaration in
      `plat_arm.h`.
      
      This does not result in any change in behavior.
      
      Change-Id: I62edfa7652b83bd26cffb7d167153959b38e37e7
      12ad4d88
  8. 28 Apr, 2015 5 commits
    • Sandrine Bailleux's avatar
      Detect SCP version incompatibility · 556b966f
      Sandrine Bailleux authored
      There has been a breaking change in the communication protocols used
      between the AP cores and the SCP on CSS based platforms like Juno.
      This means both the AP Trusted Firmware and SCP firmware must be
      updated at the same time.
      
      In case the user forgets to update the SCP ROM firmware, this patch
      detects when it still uses the previous version of the communication
      protocol. It will then output a comprehensive error message that helps
      trouble-shoot the issue.
      
      Change-Id: I7baf8f05ec0b7d8df25e0ee53df61fe7be0207c2
      556b966f
    • Sandrine Bailleux's avatar
      Move to the new ARM SCP Messaging Interfaces · e234ba03
      Sandrine Bailleux authored
      The communication protocol used between the AP cores and the SCP
      in CSS-based platforms like Juno has undergone a number of changes.
      This patch makes the required modifications to the SCP Boot Protocol,
      SCPI Protocol and MHU driver code in shared CSS platform code so that
      the AP cores are still able to communicate with the SCP.
      
      This patch focuses on the mandatory changes to make it work. The
      design of this code needs to be improved but this will come in
      a subsequent patch.
      
      The main changes are:
      
       - MHU communication protocol
      
         - The command ID and payload size are no longer written into the
           MHU registers directly. Instead, they are stored in the payload
           area. The MHU registers are now used only as a doorbell to kick
           off messages. Same goes for any command result, the AP has to
           pick it up from the payload area.
      
       - SCP Boot Protocol
      
         - The BL3-0 image is now expected to embed a checksum. This
           checksum must be passed to the SCP, which uses it to check the
           integrity of the image it received.
      
         - The BL3-0 image used to be transferred a block (4KB)
           at a time. The SCP now supports receiving up to 128KB at a
           time, which is more than the size of the BL3-0 image.
           Therefore, the image is now sent in one go.
      
         - The command IDs have changed.
      
       - SCPI Protocol
      
         - The size of the SCPI payload has been reduced down from 512
           bytes to 256 bytes. This changes the base address of the
           AP-to-SCP payload area.
      
         - For commands that have a response, the response is the same SCPI
           header that was sent, except for the size and the status, which
           both must be updated appropriately. Success/Failure of a command
           is determined by looking at the updated status code.
      
         - Some command IDs have changed.
      
      NOTE: THIS PATCH BREAKS COMPATIBILITY WITH FORMER VERSIONS OF THE SCP
      FIRMWARE AND THUS REQUIRES AN UPDATE OF THIS BINARY. THE LATEST SCP
      BINARY CAN BE OBTAINED FROM THE ARM CONNECTED COMMUNITY WEBSITE.
      
      Change-Id: Ia5f6b95fe32401ee04a3805035748e8ef6718da7
      e234ba03
    • Dan Handley's avatar
      Move Juno port to plat/arm/board/juno · 85135283
      Dan Handley authored
      Move the Juno port from plat/juno to plat/arm/board/juno. Also rename
      some of the files so they are consistently prefixed with juno_.
      Update the platform makefiles accordingly.
      
      Change-Id: I0af6cb52a5fee7ef209107a1188b76a3c33a2a9f
      85135283
    • Dan Handley's avatar
      Move FVP port to plat/arm/board/fvp · 3fc4124c
      Dan Handley authored
      Move the FVP port from plat/fvp to plat/arm/board/fvp. Also rename
      some of the files so they are consistently prefixed with fvp_.
      Update the platform makefiles accordingly.
      
      Change-Id: I7569affc3127d66405f1548fc81b878a858e61b7
      3fc4124c
    • Dan Handley's avatar
      Add common ARM and CSS platform code · b4315306
      Dan Handley authored
      This major change pulls out the common functionality from the
      FVP and Juno platform ports into the following categories:
      
      *   (include/)plat/common. Common platform porting functionality that
      typically may be used by all platforms.
      
      *   (include/)plat/arm/common. Common platform porting functionality
      that may be used by all ARM standard platforms. This includes all
      ARM development platforms like FVP and Juno but may also include
      non-ARM-owned platforms.
      
      *   (include/)plat/arm/board/common. Common platform porting
      functionality for ARM development platforms at the board
      (off SoC) level.
      
      *   (include/)plat/arm/css/common. Common platform porting
      functionality at the ARM Compute SubSystem (CSS) level. Juno
      is an example of a CSS-based platform.
      
      *   (include/)plat/arm/soc/common. Common platform porting
      functionality at the ARM SoC level, which is not already defined
      at the ARM CSS level.
      
      No guarantees are made about the backward compatibility of
      functionality provided in (include/)plat/arm.
      
      Also remove any unnecessary variation between the ARM development
      platform ports, including:
      
      *   Unify the way BL2 passes `bl31_params_t` to BL3-1. Use the
      Juno implementation, which copies the information from BL2 memory
      instead of expecting it to persist in shared memory.
      
      *   Unify the TZC configuration. There is no need to add a region
      for SCP in Juno; it's enough to simply not allow any access to
      this reserved region. Also set region 0 to provide no access by
      default instead of assuming this is the case.
      
      *   Unify the number of memory map regions required for ARM
      development platforms, although the actual ranges mapped for each
      platform may be different. For the FVP port, this reduces the
      mapped peripheral address space.
      
      These latter changes will only be observed when the platform ports
      are migrated to use the new common platform code in subsequent
      patches.
      
      Change-Id: Id9c269dd3dc6e74533d0e5116fdd826d53946dc8
      b4315306