1. 13 Jun, 2016 2 commits
  2. 09 Jun, 2016 1 commit
  3. 08 Jun, 2016 4 commits
  4. 07 Jun, 2016 2 commits
  5. 06 Jun, 2016 2 commits
    • danh-arm's avatar
      Merge pull request #644 from sandrine-bailleux-arm/sb/rm-outdated-comment · 87e7a9a5
      danh-arm authored
      xlat lib: Remove out-dated comment
      87e7a9a5
    • Sandrine Bailleux's avatar
      Move checkpatch options in a configuration file · f607739c
      Sandrine Bailleux authored
      At the moment, the top Makefile specifies the options to pass to the
      checkpatch script in order to check the coding style. The checkpatch
      script also supports reading its options from a configuration file
      rather than from the command line.
      
      This patch makes use of this feature and moves the checkpatch options
      out of the Makefile. This simplifies the Makefile and makes things
      clearer.
      
      This patch also adds some more checkpatch options:
        --showfile
        --ignore FILE_PATH_CHANGES
        --ignore AVOID_EXTERNS
        --ignore NEW_TYPEDEFS
        --ignore VOLATILE
      The rationale behind each of these options has been documented
      in the configuration file.
      
      Change-Id: I423e1abe5670c0f57046cbf705f89a8463898676
      f607739c
  6. 03 Jun, 2016 12 commits
    • Soby Mathew's avatar
      Allow dynamic overriding of ROTPK verification · 04943d33
      Soby Mathew authored
      A production ROM with TBB enabled must have the ability to boot test software
      before a real ROTPK is deployed (e.g. manufacturing mode). Previously the
      function plat_get_rotpk_info() must return a valid ROTPK for TBB to succeed.
      This patch adds an additional bit `ROTPK_NOT_DEPLOYED` in the output `flags`
      parameter from plat_get_rotpk_info(). If this bit is set, then the ROTPK
      in certificate is used without verifying against the platform value.
      
      Fixes ARM-software/tf-issues#381
      
      Change-Id: Icbbffab6bff8ed76b72431ee21337f550d8fdbbb
      04943d33
    • danh-arm's avatar
      Merge pull request #641 from antonio-nino-diaz-arm/an/fvp-set-nv-ctr · 11ec6c59
      danh-arm authored
      Implement plat_set_nv_ctr for FVP platforms
      11ec6c59
    • danh-arm's avatar
      Merge pull request #640 from sandrine-bailleux-arm/sb/fix-syntax-error · c47a0784
      danh-arm authored
      Fix a syntax error in plat/arm/common/aarch64/arm_common.c
      c47a0784
    • danh-arm's avatar
      Merge pull request #637 from yatharth-arm/yk/genfw-1134 · aed634fe
      danh-arm authored
      Add support for ARM Cortex-A73 MPCore Processor
      aed634fe
    • danh-arm's avatar
      Merge pull request #636 from soby-mathew/sm/cpu_ctx_rem_aarch32_regs · 8d8c61ea
      danh-arm authored
      Build option to include AArch32 registers in cpu context
      8d8c61ea
    • Sandrine Bailleux's avatar
      Fix a syntax error · b4127c1f
      Sandrine Bailleux authored
      Building TF with ERROR_DEPRECATED=1 fails because of a missing
      semi-column. This patch fixes this syntax error.
      
      Change-Id: I98515840ce74245b0a0215805f85c8e399094f68
      b4127c1f
    • Dan Handley's avatar
      Minor libfdt changes to enable TF integration · 754d78b1
      Dan Handley authored
      
      
      * Move libfdt API headers to include/lib/libfdt
      * Add libfdt.mk helper makefile
      * Remove unused libfdt files
      * Minor changes to fdt.h and libfdt.h to make them C99 compliant
      Co-Authored-By: default avatarJens Wiklander <jens.wiklander@linaro.org>
      
      Change-Id: I425842c2b111dcd5fb6908cc698064de4f77220e
      754d78b1
    • Dan Handley's avatar
      Import libfdt v1.4.1 · 91176bc6
      Dan Handley authored
      Imports libfdt code from https://git.kernel.org/cgit/utils/dtc/dtc.git
      tag "v1.4.1" commit 302fca9f4c283e1994cf0a5a9ce1cf43ca15e6d2.
      
      Change-Id: Ia0d966058beee55a9047e80d8a05bbe4f71d8446
      91176bc6
    • Dan Handley's avatar
      Exclude more files from checkpatch and checkcodebase · 1a41e8c1
      Dan Handley authored
      Exclude documentation files from the `make checkcodebase` target
      (these files were already excluded from checkpatch).
      
      Also exclude libfdt files to prepare for import of this library.
      
      Change-Id: Iee597ed66494de2b11cf84096f771f1f04472d5b
      1a41e8c1
    • Dan Handley's avatar
      Move stdlib header files to include/lib/stdlib · f0b489c1
      Dan Handley authored
      * Move stdlib header files from include/stdlib to include/lib/stdlib for
        consistency with other library headers.
      * Fix checkpatch paths to continue excluding stdlib files.
      * Create stdlib.mk to define the stdlib source files and include directories.
      * Include stdlib.mk from the top level Makefile.
      * Update stdlib header path in the fip_create Makefile.
      * Update porting-guide.md with the new paths.
      
      Change-Id: Ia92c2dc572e9efb54a783e306b5ceb2ce24d27fa
      f0b489c1
    • Antonio Nino Diaz's avatar
      Implement plat_set_nv_ctr for FVP platforms · fe7de035
      Antonio Nino Diaz authored
      Replaced placeholder implementation of plat_set_nv_ctr for FVP
      platforms by a working one.
      
      On FVP, the mapping of region DEVICE2 has been changed from RO to RW
      to prevent exceptions when writing to the NV counter, which is
      contained in this region.
      
      Change-Id: I56a49631432ce13905572378cbdf106f69c82f57
      fe7de035
    • Soby Mathew's avatar
      Build option to include AArch32 registers in cpu context · 8cd16e6b
      Soby Mathew authored
      The system registers that are saved and restored in CPU context include
      AArch32 systems registers like SPSR_ABT, SPSR_UND, SPSR_IRQ, SPSR_FIQ,
      DACR32_EL2, IFSR32_EL2 and FPEXC32_EL2. Accessing these registers on an
      AArch64-only (i.e. on hardware that does not implement AArch32, or at
      least not at EL1 and higher ELs) platform leads to an exception. This patch
      introduces the build option `CTX_INCLUDE_AARCH32_REGS` to specify whether to
      include these AArch32 systems registers in the cpu context or not. By default
      this build option is set to 1 to ensure compatibility. AArch64-only platforms
      must set it to 0. A runtime check is added in BL1 and BL31 cold boot path to
      verify this.
      
      Fixes ARM-software/tf-issues#386
      
      Change-Id: I720cdbd7ed7f7d8516635a2ec80d025f478b95ee
      8cd16e6b
  7. 02 Jun, 2016 1 commit
    • Sandrine Bailleux's avatar
      xlat lib: Remove out-dated comment · 72b60081
      Sandrine Bailleux authored
      As of commit e1ea9290, if the attributes of an inner memory region
      are different than the outer region, new page tables are generated
      regardless of how "restrictive" they are. This patch removes an
      out-dated comment still referring to the old priority system based
      on which attributes were more restrictive.
      
      Change-Id: Ie7fc1629c90ea91fe50315145f6de2f3995e5e00
      72b60081
  8. 01 Jun, 2016 1 commit
    • Yatharth Kochar's avatar
      Add support for ARM Cortex-A73 MPCore Processor · 2460ac18
      Yatharth Kochar authored
      This patch adds ARM Cortex-A73 MPCore Processor support
      in the CPU specific operations framework. It also includes
      this support for the Base FVP port.
      
      Change-Id: I0e26b594f2ec1d28eb815db9810c682e3885716d
      2460ac18
  9. 27 May, 2016 9 commits
  10. 26 May, 2016 2 commits
    • Sandrine Bailleux's avatar
      Fill exception vectors with zero bytes · 79627dc3
      Sandrine Bailleux authored
      The documentation of the GNU assembler specifies the following about
      the .align assembler directive:
       "the padding bytes are normally zero. However, on some systems, if
       the section is marked as containing code and the fill value is
       omitted, the space is filled with no-op instructions."
      (see https://sourceware.org/binutils/docs/as/Align.html)
      
      When building Trusted Firmware, the AArch64 GNU assembler uses a
      mix of zero bytes and no-op instructions as the padding bytes to
      align exception vectors.
      
      This patch mandates to use zero bytes to be stored in the padding
      bytes in the exception vectors. In the AArch64 instruction set, no
      valid instruction encodes as zero so this effectively inserts
      illegal instructions. Should this code end up being executed for
      any reason, it would crash immediately. This gives us an extra
      protection against misbehaving code at no extra cost.
      
      Change-Id: I4f2abb39d0320ca0f9d467fc5af0cb92ae297351
      79627dc3
    • Sandrine Bailleux's avatar
      Introduce some helper macros for exception vectors · e0ae9fab
      Sandrine Bailleux authored
      This patch introduces some assembler macros to simplify the
      declaration of the exception vectors. It abstracts the section
      the exception code is put into as well as the alignments
      constraints mandated by the ARMv8 architecture. For all TF images,
      the exception code has been updated to make use of these macros.
      
      This patch also updates some invalid comments in the exception
      vector code.
      
      Change-Id: I35737b8f1c8c24b6da89b0a954c8152a4096fa95
      e0ae9fab
  11. 25 May, 2016 3 commits
    • Soby Mathew's avatar
      PSCI: Add pwr_domain_pwr_down_wfi() hook in plat_psci_ops · ac1cc8eb
      Soby Mathew authored
      This patch adds a new optional platform hook `pwr_domain_pwr_down_wfi()` in
      the plat_psci_ops structure. This hook allows the platform to perform platform
      specific actions including the wfi invocation to enter powerdown. This hook
      is invoked by both psci_do_cpu_off() and psci_cpu_suspend_start() functions.
      The porting-guide.md is also updated for the same.
      
      This patch also modifies the `psci_power_down_wfi()` function to invoke
      `plat_panic_handler` incase of panic instead of the busy while loop.
      
      Fixes ARM-Software/tf-issues#375
      
      Change-Id: Iba104469a1445ee8d59fb3a6fdd0a98e7f24dfa3
      ac1cc8eb
    • Soby Mathew's avatar
      Add CCN support to FVP platform port · 71237876
      Soby Mathew authored
      This patch adds support to select CCN driver for FVP during build.
      A new build option `FVP_INTERCONNECT_DRIVER` is added to allow
      selection between the CCI and CCN driver. Currently only the CCN-502
      variant is supported on FVP.
      
      The common ARM CCN platform helper file now verifies the cluster
      count declared by platform is equal to the number of root node
      masters exported by the ARM Standard platform.
      
      Change-Id: I71d7b4785f8925ed499c153b2e9b9925fcefd57a
      71237876
    • Soby Mathew's avatar
      CCN: Add API to query the PART0 ID from CCN · 6331a31a
      Soby Mathew authored
      This patch adds the API `ccn_get_part0_id` to query the PART0 ID from the
      PERIPHERAL_ID 0 register in the CCN driver. This ID allows to distinguish
      the variant of CCN present on the system and possibly enable dynamic
      configuration of the IP based on the variant. Also added an assert in
      `ccn_master_to_rn_id_map()` to ensure that the master map bitfield provided
      by the platform is within the expected interface id.
      
      Change-Id: I92d2db7bd93a9be8a7fbe72a522cbcba0aba2d0e
      6331a31a
  12. 24 May, 2016 1 commit