1. 28 Jul, 2014 4 commits
    • Juan Castillo's avatar
      Rework incorrect use of assert() and panic() in codebase · d3280beb
      Juan Castillo authored
      Assert a valid security state using the macro sec_state_is_valid().
      Replace assert() with panic() in those cases that might arise
      because of runtime errors and not programming errors.
      Replace panic() with assert() in those cases that might arise
      because of programming errors.
      
      Fixes ARM-software/tf-issues#96
      
      Change-Id: I51e9ef0439fd5ff5e0edfef49050b69804bf14d5
      d3280beb
    • Soby Mathew's avatar
      Add CPUECTLR_EL1 and Snoop Control register to crash reporting · 8c106902
      Soby Mathew authored
      This patch adds the CPUECTLR_EL1 register and the CCI Snoop Control
      register to the list of registers being reported when an unhandled
      exception occurs.
      
      Change-Id: I2d997f2d6ef3d7fa1fad5efe3364dc9058f9f22c
      8c106902
    • Soby Mathew's avatar
      Parametrize baudrate and UART clock during console_init() · 462c8350
      Soby Mathew authored
      This patch adds baud rate and UART clock frequency as parameters
      to the pl011 driver api console_init(). This allows each platform
      to specify UART clock and baud rate according to their specific
      hardware implementation.
      
      Fixes ARM-software/tf-issues#215
      
      Change-Id: Id13eef70a1c530e709b34dd1e6eb84db0797ced2
      462c8350
    • Soby Mathew's avatar
      Introduce asm console functions in TF · fce5f750
      Soby Mathew authored
      This patch replaces the pl011 console family of functions
      with their equivalents defined in assembly. The baud rate is
      defined by the PL011_BAUDRATE macro and IBRD and FBRD values
      for pl011 are computed statically. This patch will enable
      us to invoke the console functions without the C Runtime Stack.
      
      Change-Id: Ic3f7b7370ded38bf9020bf746b362081b76642c7
      fce5f750
  2. 09 Jul, 2014 1 commit
    • Dan Handley's avatar
      Refactor fvp gic code to be a generic driver · 1e8c5c4f
      Dan Handley authored
      Refactor the FVP gic code in plat/fvp/fvp_gic.c to be a generic ARM
      GIC driver in drivers/arm/gic/arm_gic.c. Provide the platform
      specific inputs in the arm_gic_setup() function so that the driver
      has no explicit dependency on platform code.
      
      Provide weak implementations of the platform interrupt controller
      API in a new file, plat/common/plat_gic.c. These simply call through
      to the ARM GIC driver.
      
      Move the only remaining FVP GIC function, fvp_gic_init() to
      plat/fvp/aarch64/fvp_common.c and remove plat/fvp/fvp_gic.c
      
      Fixes ARM-software/tf-issues#182
      
      Change-Id: Iea82fe095fad62dd33ba9efbddd48c57717edd21
      1e8c5c4f
  3. 10 Jun, 2014 1 commit
    • Andrew Thoelke's avatar
      Make system register functions inline assembly · 5c3272a7
      Andrew Thoelke authored
      Replace the current out-of-line assembler implementations of
      the system register and system instruction operations with
      inline assembler.
      
      This enables better compiler optimisation and code generation
      when accessing system registers.
      
      Fixes ARM-software/tf-issues#91
      
      Change-Id: I149af3a94e1e5e5140a3e44b9abfc37ba2324476
      5c3272a7
  4. 23 May, 2014 1 commit
  5. 22 May, 2014 2 commits
    • Achin Gupta's avatar
      Introduce platform api to access an ARM GIC · dcc1816c
      Achin Gupta authored
      This patch introduces a set of functions which allow generic firmware
      code e.g. the interrupt management framework to access the platform
      interrupt controller. APIs for finding the type and id of the highest
      pending interrupt, acknowledging and EOIing an interrupt and finding
      the security state of an interrupt have been added. It is assumed that
      the platform interrupt controller implements the v2.0 of the ARM GIC
      architecture specification. Support for v3.0 of the specification for
      managing interrupts in EL3 and the platform port will be added in the
      future.
      
      Change-Id: Ib3a01c2cf3e3ab27806930f1be79db2b29f91bcf
      dcc1816c
    • Achin Gupta's avatar
      Introduce interrupt registration framework in BL3-1 · e1333f75
      Achin Gupta authored
      This patch introduces a framework for registering interrupts routed to
      EL3. The interrupt routing model is governed by the SCR_EL3.IRQ and
      FIQ bits and the security state an interrupt is generated in. The
      framework recognizes three type of interrupts depending upon which
      exception level and security state they should be handled in
      i.e. Secure EL1 interrupts, Non-secure interrupts and EL3
      interrupts. It provides an API and macros that allow a runtime service
      to register an handler for a type of interrupt and specify the routing
      model. The framework validates the routing model and uses the context
      management framework to ensure that it is applied to the SCR_EL3 prior
      to entry into the target security state. It saves the handler in
      internal data structures. An API is provided to retrieve the handler
      when an interrupt of a particular type is asserted. Registration is
      expected to be done once by the primary CPU. The same handler and
      routing model is used for all CPUs.
      
      Support for EL3 interrupts will be added to the framework in the
      future. A makefile flag has been added to allow the FVP port choose
      between ARM GIC v2 and v3 support in EL3. The latter version is
      currently unsupported.
      
      A framework for handling interrupts in BL3-1 will be introduced in
      subsequent patches. The default routing model in the absence of any
      handlers expects no interrupts to be routed to EL3.
      
      Change-Id: Idf7c023b34fcd4800a5980f2bef85e4b5c29e649
      e1333f75
  6. 20 May, 2014 1 commit
    • Lin Ma's avatar
      Address issue 156: 64-bit addresses get truncated · 444281cc
      Lin Ma authored
      Addresses were declared as "unsigned int" in drivers/arm/peripherals/pl011/pl011.h and in function init_xlation_table. Changed to use "unsigned long" instead
      Fixes ARM-software/tf-issues#156
      444281cc
  7. 08 May, 2014 1 commit
    • Sandrine Bailleux's avatar
      Remove unused 'PL011_BASE' macro · 31bce47e
      Sandrine Bailleux authored
      'PL011_BASE' macro is no longer used because the right UART base
      address is now directly given to the 'console_init()' function.
      This patch removes it.
      
      Change-Id: I94759c99602df4876291a56f9f6a75de337a65ec
      31bce47e
  8. 06 May, 2014 4 commits
    • Dan Handley's avatar
      Reduce deep nesting of header files · 97043ac9
      Dan Handley authored
      Reduce the number of header files included from other header
      files as much as possible without splitting the files. Use forward
      declarations where possible. This allows removal of some unnecessary
      "#ifndef __ASSEMBLY__" statements.
      
      Also, review the .c and .S files for which header files really need
      including and reorder the #include statements alphabetically.
      
      Fixes ARM-software/tf-issues#31
      
      Change-Id: Iec92fb976334c77453e010b60bcf56f3be72bd3e
      97043ac9
    • Dan Handley's avatar
      Always use named structs in header files · fb037bfb
      Dan Handley authored
      Add tag names to all unnamed structs in header files. This
      allows forward declaration of structs, which is necessary to
      reduce header file nesting (to be implemented in a subsequent
      commit).
      
      Also change the typedef names across the codebase to use the _t
      suffix to be more conformant with the Linux coding style. The
      coding style actually prefers us not to use typedefs at all but
      this is considered a step too far for Trusted Firmware.
      
      Also change the IO framework structs defintions to use typedef'd
      structs to be consistent with the rest of the codebase.
      
      Change-Id: I722b2c86fc0d92e4da3b15e5cab20373dd26786f
      fb037bfb
    • Dan Handley's avatar
      Refactor GIC header files · 8a4fb6f6
      Dan Handley authored
      Move the function prototypes from gic.h into either gic_v2.h or
      gic_v3.h as appropriate. Update the source files to include the
      correct headers.
      
      Change-Id: I368cfda175cdcbd3a68f46e2332738ec49048e19
      8a4fb6f6
    • Dan Handley's avatar
      Move include and source files to logical locations · 4ecca339
      Dan Handley authored
      Move almost all system include files to a logical sub-directory
      under ./include. The only remaining system include directories
      not under ./include are specific to the platform. Move the
      corresponding source files to match the include directory
      structure.
      
      Also remove pm.h as it is no longer used.
      
      Change-Id: Ie5ea6368ec5fad459f3e8a802ad129135527f0b3
      4ecca339