1. 04 Dec, 2018 2 commits
  2. 18 Oct, 2018 1 commit
    • Grzegorz Jaszczyk's avatar
      mvebu: cp110: introduce COMPHY porting layer · 42a29337
      Grzegorz Jaszczyk authored
      
      
      Some of COMPHY parameters depends on the hw connection between the SoC
      and the PHY, which can vary on different boards e.g. due to different
      wires length. Define the "porting layer" with some defaults
      parameters. It ease updating static values which needs to be updated due
      to board differences, which are now grouped in one place.
      
      Example porting layer for a8k-db is under:
      plat/marvell/a8k/a80x0/board/phy-porting-layer.h
      
      If for some boards parameters are not defined (missing
      phy-porting-layer.h), the default values are used
      (drivers/marvell/comphy/phy-default-porting-layer.h)
      and the following compilation warning is show:
      "Using default comphy params - you may need to suit them to your board".
      
      The common COMPHY driver code is extracted in order to be shared with
      future COMPHY driver for A3700 SoC platforms
      Signed-off-by: default avatarGrzegorz Jaszczyk <jaz@semihalf.com>
      Signed-off-by: default avatarIgal Liberman <igall@marvell.com>
      Signed-off-by: default avatarKonstantin Porotchkin <kostap@marvell.com>
      42a29337
  3. 02 Sep, 2018 2 commits
  4. 22 Aug, 2018 1 commit
  5. 10 Aug, 2018 1 commit
  6. 18 Jul, 2018 1 commit