- 26 Mar, 2021 2 commits
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Nishanth Menon authored
Lets cast our macros to the right types and reduce a few MISRA warnings. Signed-off-by:
Nishanth Menon <nm@ti.com> Change-Id: I0dc06072713fe7c9440eca0635094c5f3ceb7f1c
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Nishanth Menon authored
We actually have additional table entries than what we accounted for in our size. MAX_XLAT_TABLES is 8, but really we could be using upto 10 depending on the platform. So, we need an extra 8K space in. This gets exposed with DEBUG=1 and assert checks trigger, which for some reason completely escaped testing previously. ASSERT: lib/xlat_tables_v2/xlat_tables_core.c:97 BACKTRACE: START: assert Signed-off-by:
Nishanth Menon <nm@ti.com> Change-Id: I5c5d04440ef1fccfaf2317066f3abbc0ec645903
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- 23 Dec, 2020 1 commit
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Andrew F. Davis authored
Add device support for the 'lite' K3 devices. These will use modified device addresses and allow for fewer cores to save memory. Note: This family of devices are characterized by a single cluster of ARMv8 processor upto a max of 4 processors and lack of a level 3 cache. The first generation of this family is introduced with AM642. See AM64X Technical Reference Manual (SPRUIM2, Nov 2020) for further details: https://www.ti.com/lit/pdf/spruim2 Signed-off-by:
Andrew F. Davis <afd@ti.com> Signed-off-by:
Nishanth Menon <nm@ti.com> Change-Id: I8cd2c1c9a9434646d0c72fca3162dd5bc9bd692a
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