- 28 Jan, 2020 1 commit
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Louis Mayencourt authored
The Secure Configuration Register is 64-bits in AArch64 and 32-bits in AArch32. Use u_register_t instead of unsigned int to reflect this. Change-Id: I51b69467baba36bf0cfaec2595dc8837b1566934 Signed-off-by:Louis Mayencourt <louis.mayencourt@arm.com>
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- 25 Nov, 2019 2 commits
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James Liao authored
CPU0 is default on, so it doesn't need to run pwr_domain_on() at boot. CPU0 AARCH64 will be set in pwr_domain_suspend(), but it may encounter race condition with other CPUs. Now AARCH64 will be set with cluster on in pwr_domain_on(), and all CPUs on this cluster will be set together. It doesn't need to set AARCH64 again in pwr_domain_suspend(), so the race condition can be avoided. Change-Id: I5693ad56e4901f82badb0fc0d8d13e4c9acfe648 Signed-off-by:James Liao <jamesjj.liao@mediatek.com>
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kenny liang authored
Implement rdist save/resore functions to support low power scenarios. Signed-off-by:kenny liang <kenny.liang@mediatek.com> Change-Id: I9ddc077a04f843275fbe2e868cdd0bd00d622de7
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- 16 Sep, 2019 2 commits
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kenny liang authored
Add MCDI driver for power saving. Signed-off-by: -
kenny liang authored
Add MTK SPM driver for suspend/resume scenario. Signed-off-by:
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- 10 Sep, 2019 3 commits
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kenny liang authored
Implement system reset handler. Change-Id: I535ee414616dde8d2b59dec5a723a540a3a1341d Signed-off-by: -
kenny liang authored
- Add PMIC driver - Add RTC drvier - Refactor PMIC and RTC to mediatek/common - Implement system off handler Change-Id: If76497646ace1b78bc9a5fa0110b652fe512281a Signed-off-by: -
kenny liang authored
- Add DCM driver - Add SPMC driver - Implement core and cluster power on/off handlers Change-Id: I902002f8ea6f98fd73bf259188162b10d3939c72 Signed-off-by:
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- 10 May, 2019 1 commit
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kenny liang authored
- Add basic platform setup - Add generic CPU helper functions - Add delay timer platform implementation - Use TI 16550 uart driver Change-Id: I1c29569c68fe9fca5e10e88a22a29690bab7141f Signed-off-by:
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