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  1. 09 Nov, 2018 1 commit
    • Siva Durga Prasad Paladugu's avatar
      arm64: versal: Add support for new Xilinx Versal ACAPs · f91c3cb1
      Siva Durga Prasad Paladugu authored 
      

Xilinx is introducing Versal, an adaptive compute acceleration platform
(ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar
Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with
leading-edge memory and interfacing technologies to deliver powerful
heterogeneous acceleration for any application. The Versal AI Core series has
five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm
Cortex-A72 application processors, dual-core Arm Cortex-R5 real-time
processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines
optimized for high-precision floating point with low latency.

This patch adds Virtual QEMU platform support for
this SoC "versal_virt".
Signed-off-by: default avatarSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
      f91c3cb1
  3. 29 Oct, 2018 1 commit
  5. 26 Oct, 2018 1 commit
  7. 25 Oct, 2018 1 commit
  9. 24 Oct, 2018 2 commits
    • Antonio Nino Diaz's avatar
      rpi3: Add mem reserve region to DTB if present · 5341b42e
      Antonio Nino Diaz authored 
      

When a device tree blob is present at a known address, instead of, for
example, relying on the user modifying the Linux command line to warn
about the memory reserved for the Trusted Firmware, pass it on the DTB.

The current code deletes the memory reserved for the default bootstrap
of the Raspberry Pi and adds the region used by the Trusted Firmware.

This system replaces the previous one consisting on adding
``memmap=16M$256M`` to the Linux command line. It's also meant to be
used by U-Boot and any other bootloader that understands DTB files.

Change-Id: I13ee528475fb043d6e8d9e9f24228e37ac3ac436
Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      5341b42e
    • Yann Gautier's avatar
      docs: stm32mp1: complete compilation and flashing steps · 1ebb915a
      Yann Gautier authored 
      

Add U-Boot compilation information.
Add a chapter about how to populate SD-card.
Signed-off-by: default avatarYann Gautier <yann.gautier@st.com>
      1ebb915a
  11. 18 Oct, 2018 1 commit
    • Grzegorz Jaszczyk's avatar
      mvebu: cp110: introduce COMPHY porting layer · 42a29337
      Grzegorz Jaszczyk authored 
      

Some of COMPHY parameters depends on the hw connection between the SoC
and the PHY, which can vary on different boards e.g. due to different
wires length. Define the "porting layer" with some defaults
parameters. It ease updating static values which needs to be updated due
to board differences, which are now grouped in one place.

Example porting layer for a8k-db is under:
plat/marvell/a8k/a80x0/board/phy-porting-layer.h

If for some boards parameters are not defined (missing
phy-porting-layer.h), the default values are used
(drivers/marvell/comphy/phy-default-porting-layer.h)
and the following compilation warning is show:
"Using default comphy params - you may need to suit them to your board".

The common COMPHY driver code is extracted in order to be shared with
future COMPHY driver for A3700 SoC platforms
Signed-off-by: default avatarGrzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: default avatarIgal Liberman <igall@marvell.com>
Signed-off-by: default avatarKonstantin Porotchkin <kostap@marvell.com>
      42a29337
  13. 17 Oct, 2018 1 commit
    • Jorge Ramirez-Ortiz's avatar
      rcar-gen3: initial commit for the rcar-gen3 boards · 7e532c4b
      Jorge Ramirez-Ortiz authored 
      Reference code:
==============

rar_gen3: IPL and Secure Monitor Rev1.0.22
https://github.com/renesas-rcar/arm-trusted-firmware [rcar_gen3]

Author: Takuya Sakata <takuya.sakata.wz@bp.renesas.com>
Date:   Thu Aug 30 21:26:41 2018 +0900
	Update IPL and Secure Monitor Rev1.0.22

General Information:
===================

This port has been tested on the Salvator-X Soc_id r8a7795 revision
ES1.1 (uses an SPD).

Build Tested:
-------------
ATFW_OPT="LSI=H3 RCAR_DRAM_SPLIT=1 RCAR_LOSSY_ENABLE=1"
MBEDTLS_DIR=$mbedtls

$ make clean bl2 bl31 rcar PLAT=rcar ${ATFW_OPT} SPD=opteed

Other dependencies:
------------------
* mbed_tls:
  git@github.com:ARMmbed/mbedtls.git [devel]

  Merge: 68dbc94 f34a4c1
  Author: Simon Butcher <simon.butcher@arm.com>
  Date:   Thu Aug 30 00:57:28 2018 +0100

* optee_os:
  https://github.com/BayLibre/optee_os



  Until it gets merged into OP-TEE, the port requires Renesas' Trusted
  Environment with a modification to support power management.

  Author: Jorge Ramirez-Ortiz <jramirez@baylibre.com>
  Date:   Thu Aug 30 16:49:49 2018 +0200
    plat-rcar: cpu-suspend: handle the power level
Signed-off-by: default avatarJorge Ramirez-Ortiz <jramirez@baylibre.com>

* u-boot:
  The port has beent tested using mainline uboot.

  Author: Fabio Estevam <festevam@gmail.com>
  Date:   Tue Sep 4 10:23:12 2018 -0300

*linux:
  The port has beent tested using mainline kernel.

  Author: Linus Torvalds <torvalds@linux-foundation.org>
  Date:   Sun Sep 16 11:52:37 2018 -0700
      Linux 4.19-rc4

Overview
---------

BOOTROM starts the cpu at EL3; In this port BL2 will therefore be entered
at this exception level (the Renesas' ATF reference tree [1] resets into
EL1 before entering BL2 - see its bl2.ld.S)

BL2 initializes DDR (and i2c to talk to the PMIC on some platforms)
before determining the boot reason (cold or warm).

During suspend all CPUs are switched off and the DDR is put in
backup mode (some kind of self-refresh mode). This means that BL2 is
always entered in a cold boot scenario.

Once BL2 boots, it determines the boot reason, writes it to shared
memory (BOOT_KIND_BASE) together with the BL31 parameters
(PARAMS_BASE) and jumps to BL31.

To all effects, BL31 is as if it is being entered in reset mode since
it still needs to initialize the rest of the cores; this is the reason
behind using direct shared memory access to  BOOT_KIND_BASE and
PARAMS_BASE instead of using registers to get to those locations (see
el3_common_macros.S and bl31_entrypoint.S for the RESET_TO_BL31 use
case).

Depending on the boot reason BL31 initializes the rest of the cores:
in case of suspend, it uses a MBOX memory region to recover the
program counters.

[1] https://github.com/renesas-rcar/arm-trusted-firmware


Tests
-----

* cpuidle
  -------
   enable kernel's cpuidle arm_idle driver and boot

* system suspend
  --------------
  $ cat suspend.sh
    #!/bin/bash
    i2cset -f -y 7 0x30 0x20 0x0F
    read -p "Switch off SW23 and press return " foo
    echo mem > /sys/power/state

* cpu hotplug:
  ------------
  $ cat offline.sh
    #!/bin/bash
    nbr=$1
    echo 0 > /sys/devices/system/cpu/cpu$nbr/online
    printf "ONLINE:  " && cat /sys/devices/system/cpu/online
    printf "OFFLINE: " && cat /sys/devices/system/cpu/offline

  $ cat online.sh
    #!/bin/bash
    nbr=$1
    echo 1 > /sys/devices/system/cpu/cpu$nbr/online
    printf "ONLINE:  " && cat /sys/devices/system/cpu/online
    printf "OFFLINE: " && cat /sys/devices/system/cpu/offline
Signed-off-by: default avatarldts <jramirez@baylibre.com>
      7e532c4b
  15. 16 Oct, 2018 1 commit
    • Jeenu Viswambharan's avatar
      AArch64: Enable lower ELs to use pointer authentication · 3ff4aaac
      Jeenu Viswambharan authored 
      

Pointer authentication is an Armv8.3 feature that introduces
instructions that can be used to authenticate and verify pointers.

Pointer authentication instructions are allowed to be accessed from all
ELs but only when EL3 explicitly allows for it; otherwise, their usage
will trap to EL3. Since EL3 doesn't have trap handling in place, this
patch unconditionally disables all related traps to EL3 to avoid
potential misconfiguration leading to an unhandled EL3 exception.

Fixes ARM-software/tf-issues#629

Change-Id: I9bd2efe0dc714196f503713b721ffbf05672c14d
Signed-off-by: default avatarJeenu Viswambharan <jeenu.viswambharan@arm.com>
      3ff4aaac
  17. 10 Oct, 2018 2 commits
  19. 03 Oct, 2018 2 commits
    • Konstantin Porotchkin's avatar
      marvell: Move BLE from external repo to the platform folder · 37c4341b
      Konstantin Porotchkin authored 
      

The BLE is the pre-TF-A boot stage required by Marvell Armada
BootROM for bringing up DRAM and allow the boot image copy to it.
Since this is not a standard boot level and only uses the TF-A
as a build environment, it was introduced out of source tree.
However it turns out that such remote location introduces additional
complexity to the upstream TF-A build process.
In order to simplify the build environment the BLE source folder
is relocated from the external repository to A8K platform directory.
The build documentation is updated accordingly.
Signed-off-by: default avatarKonstantin Porotchkin <kostap@marvell.com>
      37c4341b
    • Daniel Boulby's avatar
      Introduce RECLAIM_INIT_CODE build flag · 1dcc28cf
      Daniel Boulby authored 
      

This patch introduces a build flag "RECLAIM_INIT_CODE" to mark boot time
code which allows platforms to place this memory in an appropriate
section to be reclaimed later. This features is primarily targeted for
BL31. Appropriate documentation updates are also done.

Change-Id: If0ca062851614805d769c332c771083d46599194
Signed-off-by: default avatarDaniel Boulby <daniel.boulby@arm.com>
      1dcc28cf
  21. 02 Oct, 2018 4 commits
  23. 01 Oct, 2018 1 commit
  25. 28 Sep, 2018 7 commits
  27. 21 Sep, 2018 1 commit
  29. 20 Sep, 2018 2 commits
  31. 11 Sep, 2018 1 commit
  33. 04 Sep, 2018 4 commits
  35. 02 Sep, 2018 1 commit
  37. 30 Aug, 2018 3 commits
    • Douglas Raillard's avatar
      backtrace: Introduce backtrace function · 0c62883f
      Douglas Raillard authored 
      

This function diplays the backtrace, the current EL and security state
to allow a post-processing tool to choose the right binary to interpret
the dump.

The output can be fed to GNU addr2line to resolve function names given
an ELF binary compiled with debug information. The "-i" flag is
recommended to improve display in case of inlined functions. The *.dump
files generated during the build process can also be used.

The function works in AArch64 and AArch32. In AArch32 it only works in
A32 mode (without T32 interworking), which is enforced in the Makefile.

Sample output of a backtrace at EL3:

    BACKTRACE: START: function_name
    0: EL3: 0x798
    1: EL3: 0x538
    2: EL3: 0x550
    3: EL3: 0x55c
    4: EL3: 0x568
    5: EL3: 0x5a8
    6: EL3: 0xf4
    BACKTRACE: END: function_name

In order to enable it the new option ENABLE_BACKTRACE must be set to 1.
This option is set to 1 by default only in AArch64 debug builds. As
usual, it can be overridden by the platform makefile and in the build
command line.

Change-Id: Icaff39b0e5188329728be2f3c72b868b2368e794
Co-authored-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
Signed-off-by: default avatarDouglas Raillard <douglas.raillard@arm.com>
      0c62883f
    • Antonio Nino Diaz's avatar
      Allow manually setting the AArch32 instruction set · 8fd9d4d5
      Antonio Nino Diaz authored 
      

At the moment the AArch32 instruction set isn't specified in the command
line, which means that the compiler is free to choose the one it sees
fit. This decision may change between compiler versions, so it is better
to specify it manually.

The build option AARCH32_INSTRUCTION_SET has been introduced for this
reason. This option can be set to T32 or A32 to pass the correct flags
to the compiler.

The current behaviour is to default to T32 due to it's smaller size.

Change-Id: I02297eb1d9404b5868ff7c054fbff9b3cda7fdb6
Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      8fd9d4d5
    • Julius Werner's avatar
      context_mgmt: Fix HANDLE_EA_EL3_FIRST implementation · 24f671f3
      Julius Werner authored 
      This patch fixes a bug in the context management code that causes it to
ignore the HANDLE_EA_EL3_FIRST compile-time option and instead always
configure SCR_EL3 to force all external aborts to trap into EL3. The
code used #ifdef to read compile-time option declared with add_define in
the Makefile... however, those options are always defined, they're just
defined to either 0 or 1, so #if is the correct syntax to check for
them. Also update the documentation to match.

This bug has existed since the Nov 2017 commit 76454abf

 (AArch64:
Introduce External Abort handling), which changed the
HANDLE_EA_EL3_FIRST option to use add_define.

Change-Id: I7189f41d0daee78fa2fcf4066323e663e1e04d3d
Signed-off-by: default avatarJulius Werner <jwerner@chromium.org>
      24f671f3
  39. 22 Aug, 2018 2 commits
  41. 20 Aug, 2018 1 commit
    • Jeenu Viswambharan's avatar
      AArch64: Enable MPAM for lower ELs · 5f835918
      Jeenu Viswambharan authored 
      

Memory Partitioning And Monitoring is an Armv8.4 feature that enables
various memory system components and resources to define partitions.
Software running at various ELs can then assign themselves to the
desired partition to control their performance aspects.

With this patch, when ENABLE_MPAM_FOR_LOWER_ELS is set to 1, EL3 allows
lower ELs to access their own MPAM registers without trapping to EL3.
This patch however doesn't make use of partitioning in EL3; platform
initialisation code should configure and use partitions in EL3 if
required.

Change-Id: I5a55b6771ccaa0c1cffc05543d2116b60cbbcdcd
Co-authored-by: default avatarJames Morse <james.morse@arm.com>
Signed-off-by: default avatarJeenu Viswambharan <jeenu.viswambharan@arm.com>
      5f835918