- 03 Sep, 2018 3 commits
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Marcin Wojtas authored
This patch enables handling PMU overflow IRQ by GIC SPI's directly in EL3. Also implement additional SMC routine, which can disable the solution on demand in runtime. Since it is possible to configure PMU interrupt trigger type in the MADT ACPI table, it is enough to set it only once in EL3 during initialization. Change-Id: Ie76aa62ccc4fd7cabfec9e3d5ed9970ada1c1b2a Signed-off-by: Marcin Wojtas <mw@semihalf.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
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Marcin Wojtas authored
It turned out that resetting the RTC time register is not necessary during initial configuration. Safely remove it from the sequence. Change-Id: Id2b9c7db44a8c8dbe88a7f8a21695b72a7fd78ee Signed-off-by: Marcin Wojtas <mw@semihalf.com> Reviewed-by: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
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Marcin Wojtas authored
This patch introduces new helper routines that allow configuring the individual IRQs to be edge/level-triggered via GICD_ICFGR registers. This is helpful to modify the default configuration of the non-secure GIC SPI's, which are all set during initialization to be level-sensitive. Change-Id: I23deb4a0381691a686a3cda52405aa1dfd5e56f2 Signed-off-by: Marcin Wojtas <mw@semihalf.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
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- 02 Sep, 2018 9 commits
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Marcin Wojtas authored
Current default behavior of cpu_standby callback is problematic during the SBSA test, which is unable to run due to EL3 panic. Make it dependent on the PM firmware running. Change-Id: I7a53de8c880bd23b157dd65ce14bb48b5a5c76c8 Signed-off-by: Marcin Wojtas <mw@semihalf.com> Reviewed-by: Grzegorz Jaszczyk <jaz@semihalf.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
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Grzegorz Jaszczyk authored
Use PF instead of PP post-fix, since it is referring to "Phase Final" (only G3 related register had correct spelling for relevant bit). Change-Id: Ia5a9c9c78b74b15f7f8adde2c3ef4784c513da2c Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Reviewed-by: Igal Liberman <igall@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
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Grzegorz Jaszczyk authored
The biggest comphy index can be equal to 6 so there is no need to use uint64_t for storing it. Change-Id: I14c2b68e51678a560815963c72aed0c37068f926 Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Reviewed-by: Igal Liberman <igall@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
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Marcin Wojtas authored
In order to allow the use of PCIe cards such as graphics cards, whose demands for BAR space are typically much higher than those of network or SATA/USB cards, reconfigure the I/O windows so we can declare two MMIO PCI regions: a 512 MB MMIO32 one at 0xc000_0000 and a 4 GB MMIO64 one at 0x8_0000_0000. In addition, this will leave ample room for an ECAM config space at 0xe000_0000 (up to the ECAM maximum of 256 MB) For compatibility with older kernels or firmware, leave the original 16 MB window in place as well. Change-Id: Ia8177194e542078772f90941eced81b231c16887 Signed-off-by: Marcin Wojtas <mw@semihalf.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
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Marcin Wojtas authored
In order to allow the use of PCIe cards such as graphics cards, whose demands for BAR space are typically much higher than those of network or SATA/USB cards, reconfigure the I/O windows so we can declare two MMIO PCI regions: a 512 MB MMIO32 one at 0xc000_0000 and a 4 GB MMIO64 one at 0x8_0000_0000. In addition, this will leave ample room for an ECAM config space at 0xe000_0000 (up to the ECAM maximum of 256 MB) For compatibility with older kernels or firmware, leave the original 16 MB window in place as well. Change-Id: I80b00691ae8d0a3f3f7285b8e0bfc21c0a095e94 Signed-off-by: Marcin Wojtas <mw@semihalf.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
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Grzegorz Jaszczyk authored
Define the RT service space as secure with use of memory controller trustzone feature. Thanks to this protection, any NS-Bootloader nor NS-OS, won't be able to access RT services (e.g. accidentally overwrite it, which will at best result in RT services unavailability). Change-Id: Ie5b6cbe9a1b77879d6d8f8eac5d4e41e468496ce Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
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Grzegorz Jaszczyk authored
Add simple driver which allows to configure the memory controller trust zones. It is responsible for opening mc trustzone window, with appropriate base address, size and attributes. Example of usage in upcoming commits. Change-Id: I8bea17754d31451b305040ee7de331fb8db0c63f Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
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Konstantin Porotchkin authored
Rename a8k_common.h to armada_common.h to keep the same header name across all other Marvell Armada platforms. This is especially useful since various Marvell platforms may use common platform files and share the driver modules. Change-Id: I7262105201123d54ccddef9aad4097518f1e38ef Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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Konstantin Porotchkin authored
Update build manual - remove irrelevant platforms and environemnt variables - add links to BLE and mv_ddr Github repositories Change-Id: Ie389c61f014751cdc0459b3f78c70ede694d27b8 Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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- 30 Aug, 2018 2 commits
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Soby Mathew authored
maintainers: Update maintainer for sgi/sgm platforms
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Soby Mathew authored
K3 PSCI Support
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- 29 Aug, 2018 1 commit
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Nariman Poushin authored
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- 28 Aug, 2018 5 commits
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Dimitris Papastamos authored
maintainers: add drivers folders for STM32MP1
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Dimitris Papastamos authored
Remove unnecessary casts
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Dimitris Papastamos authored
DSU erratum 936184 workaround: bug fix
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Dimitris Papastamos authored
plat: marvell: bl31: Update the early platform setup API
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Yann Gautier authored
Folders drivers/st/ and include/drivers/st/ are added in maintainers.rst, under STM32MP1 platform port. This will allow notifications for the files modified there. Signed-off-by: Yann Gautier <yann.gautier@st.com>
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- 23 Aug, 2018 2 commits
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John Tsichritzis authored
The initial implementation was corrupting registers that it shouldn't. Now this is fixed. Change-Id: Iaa407c18e668b2d9381391bf10d6876fe936aded Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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John Tsichritzis authored
Small patch which removes some redundant casts to (void *). Change-Id: If1cfd68f2989bac1d39dbb3d1c31d4119badbc21 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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- 22 Aug, 2018 18 commits
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Andrew F. Davis authored
Use TI-SCI messages to request reset from system controller firmware. Signed-off-by: Andrew F. Davis <afd@ti.com>
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Andrew F. Davis authored
Use TI-SCI messages to request core start from system controller firmware. Signed-off-by: Andrew F. Davis <afd@ti.com>
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Andrew F. Davis authored
TI-SCI message protocol provides support for controlling of various physical cores available in the SoC. In order to control which host is capable of controlling a physical processor core, there is a processor access control list that needs to be populated as part of the board configuration data. Introduce support for the set of TI-SCI message protocol APIs that provide us with this capability of controlling physical cores. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
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Andrew F. Davis authored
Since system controller now has control over SoC power management, core operation such as reset need to be explicitly requested to reboot the SoC. Add support for this here. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
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Andrew F. Davis authored
TI-SCI message protocol provides support for management of various hardware entities within the SoC. In general, we expect to function at a device level of abstraction, however, for proper operation of hardware blocks, many clocks directly supplying the hardware block needs to be queried or configured. Introduce support for the set of TI-SCI message protocol support that provide us with this capability. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
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Andrew F. Davis authored
TI-SCI message protocol provides support for management of various hardware entitites within the SoC. We introduce the fundamental device management capability support to the driver protocol as part of this change. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
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Andrew F. Davis authored
Texas Instrument's System Control Interface (TI-SCI) Message Protocol is used in Texas Instrument's System on Chip (SoC) such as those in K3 family AM654x SoCs to communicate between various compute processors with a central system controller entity. TI-SCI message protocol provides support for management of various hardware entities within the SoC. Add support driver to allow communication with system controller entity within the SoC. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
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Andrew F. Davis authored
Secure Proxy module manages hardware threads that are meant for communication between the processor entities. Add support for this here. Signed-off-by: Andrew F. Davis <afd@ti.com>
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Dimitris Papastamos authored
libc: Cleanup library
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Antonio Nino Diaz authored
armclang replaces calls to printf by calls to one of the symbols __0printf, __1printf or __2printf. This patch adds new functions with these names that internally call printf so that the Trusted Firmware can be compiled with this compiler. Change-Id: I06a0e3e5001232fe5b2577615666ddd66e81eef0 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
tf_printf and tf_snprintf are now called printf and snprintf, so the code needs to be updated. Change-Id: Iffeee97afcd6328c4c2d30830d4923b964682d71 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change their names to printf and snprintf. They are much smaller than the previous versions we had, which makes them better suited for the Trusted Firmware. Change-Id: Ia872af91b7b967c47fce012eccecede7873a3daf Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
The C standard says that printf() has to return the number of characters it has printed. Change-Id: I0ef50b1d6766d140724ac0a2fa2c5d023431f984 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
The codebase was using non-standard headers. It is needed to replace them by the correct ones so that we can use the new libc headers. Change-Id: I530f71d9510cb036e69fe79823c8230afe890b9d Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Only leave the parts relevant to the Trusted Firmware. Change-Id: I0444c16e402f6c1629211d03bf6cb32ca3dbcf59 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: I4f58bb4660078c9bc76d2826c90b2fa711719a3e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Taken from http://git.simple-cc.org/scc/ from the following commit: 67508ad14af314cea2229783d3c084f28c41daf0 Permission has been granted from the author to use them under the license BSD-3-Clause instead of ISC. Change-Id: I65c0ce3ab60c49d34a57533af12a74bd7bde88e5 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Remove code specific to FreeBSD so that they can be used in this repository. Change-Id: I5c11eb5b3c05a7fb91aed08371a1f7a0e6122a94 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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