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errata: workaround for Neoverse V1 errata 1925756
laurenw-arm authored 
Neoverse V1 erratum 1925756 is a Cat B erratum present in r0p0, r1p0,
and r1p1 of the V1 processor core, and it is still open.

SDEN can be found here:
https://documentation-service.arm.com/static/60d499080320e92fa40b4625

Signed-off-by: default avatarLauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I6500dc98da92a7c405b9ae09d794d666e8f4ae52
741dd04c
Name Last commit Last update
..
bl_aux_params Factor out cross-BL API into export headers suitable for 3rd party code
cpus errata: workaround for Neoverse V1 errata 1925756
el3_runtime feat(sve): enable SVE for the secure world
extensions fix(el3_runtime): fix SVE and AMU extension enablement flags
fconf lib/fconf: Update 'set_fw_config_info' function
libc feat(hw_crc): add support for HW computed CRC
libfdt libfdt: Upgrade libfdt source files
pmf Increase type widths to satisfy width requirements
psci psci: utility api to invoke stop for other cores
xlat_tables Increase type widths to satisfy width requirements
zlib Standardise header guards across codebase
bakery_lock.h Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__
cassert.h Standardise header guards across codebase
coreboot.h Update in coreboot_get_memory_type API to include size as well
debugfs.h debugfs: add SMC channel
mmio.h Standardise header guards across codebase
object_pool.h fconf: Fix misra issues
optee_utils.h Sanitise includes across codebase
runtime_instr.h Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__
semihosting.h qemu: Implement qemu_system_off via semihosting.
smccc.h feat(smccc): add bit definition for SMCCC_ARCH_SOC_ID
spinlock.h Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__
utils.h arm: gicv3: Fix compiler dependent behavior
utils_def.h NXP: Timer API added to enable ARM generic timer