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Optimize barrier usage during Cortex-A57 power down
Soby Mathew authored
This the patch replaces the DSB SY with DSB ISH
after disabling L2 prefetches during the Cortex-A57
power down sequence.

Change-Id: I048d12d830c1b974b161224eff079fb9f8ecf52d
b1a9631d
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