- 06 Jan, 2020 1 commit
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Marek Vasut authored
Now that DDR drivers are mostly cleaned up , move them out of staging. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I9de63f847a0ef9ac27a79fb0f848c351fd7f4da6
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- 29 Aug, 2019 1 commit
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Marek Vasut authored
The ddr_a and ddr_b register macros are the same for the most part, unify them into a single header. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I8f55d6d779837215339ac0010e8c8ab5f6748d75
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- 16 Aug, 2019 1 commit
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Marek Vasut authored
Pull out the PRR_* macros into rcar_def.h and remove multiple copies of it. Now that there are still RCAR_* macros in rcar_def.h too and they have the exact same meaning as the PRR_* macros, but that's for another patch. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Icb7f61b971b1a23102bd1b9f58cda580660a55fc
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- 12 Jul, 2019 1 commit
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Chiaki Fujii authored
[IPL/DDR] - Update H3, M3, M3N DDR setting rev.0.36. Signed-off-by: Chiaki Fujii <chiaki.fujii.wj@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Ia4fc9456876a14a9cf3ced93163477974f6cc8bf
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- 11 Apr, 2019 1 commit
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Chiaki Fujii authored
[IPL/DDR] - Update DDR setting rev.0.35. Signed-off-by: Chiaki Fujii <chiaki.fujii.wj@renesas.com> Change-Id: I2b936ca8621ca320cc97353f99240da5f24781f7
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- 04 Mar, 2019 1 commit
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Marek Vasut authored
Add support for the M3W 3.0 SoC and synchronize the upstream ATF with Renesas downstream ATF release v2.0.1. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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- 08 Jan, 2019 1 commit
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Marek Vasut authored
Synchronize the R-Car DDR-B driver, used on R-Car H3/M3W/M3N, with Renesas ATF release 2.0.0 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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- 17 Oct, 2018 1 commit
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Jorge Ramirez-Ortiz authored
- ddr - pfc [pin function controller] - qos [bandwidth] checkpatch.pl is generating too many errors.
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