1. 17 May, 2020 1 commit
  2. 01 Apr, 2020 1 commit
  3. 22 Mar, 2020 1 commit
  4. 19 Mar, 2020 1 commit
  5. 20 Feb, 2020 2 commits
    • Varun Wadekar's avatar
      Tegra: platform handler to relocate BL32 image · 6f47acdb
      Varun Wadekar authored
      
      
      This patch provides platforms an opportunity to relocate the
      BL32 image, during cold boot. Tegra186 platforms, for example,
      relocate BL32 images to TZDRAM memory as the previous bootloader
      relies on BL31 to do so.
      
      Change-Id: Ibb864901e43aca5bf55d8c79e918b598c12e8a28
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      6f47acdb
    • Varun Wadekar's avatar
      Tegra: macro for legacy WDT FIQ handling · b20a8b92
      Varun Wadekar authored
      
      
      This patch adds the macro to enable legacy FIQ handling to the common
      Tegra makefile. The default value of this macro is '0'. Platforms that
      need this support should enable it from their makefiles.
      
      This patch also helps fix violation of Rule 20.9.
      
      Rule 20.9 "All identifiers used in the controlling expression of #if
                 of #elif preprocessing directives shall be #define'd before
                 evaluation"
      
      Change-Id: I4f0c9917c044b5b1967fb5e79542cd3bf6e91f18
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      b20a8b92
  6. 01 Mar, 2019 1 commit
    • Varun Wadekar's avatar
      Tegra: dummy support for the io_storage backend · 8d56e24b
      Varun Wadekar authored
      
      
      This patch provides dummy macros and platform files to compile
      the io_storage driver backend. This patch is necessary to
      remove the "--unresolved=el3_panic" linker flag from Tegra's
      makefiles and allow us to revert this workaround, previously
      suggested by the ARM toolchain team.
      
      The "--unresolved=el3_panic" flag actually was a big hammer that
      allowed Tegra platforms to work with armlink previously but it
      masks legit errors with the code as well.
      
      Change-Id: I0421d35657823215229f84231896b84167f90548
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      8d56e24b
  7. 27 Feb, 2019 1 commit
    • Varun Wadekar's avatar
      Tegra: Support for scatterfile for the BL31 image · c2ad38ce
      Varun Wadekar authored
      
      
      This patch provides support for using the scatterfile format as
      the linker script with the 'armlink' linker for Tegra platforms.
      
      In order to enable the scatterfile usage the following changes
      have been made:
      
      * provide mapping for ld.S symbols in bl_common.h
      * include bl_common.h from all the affected files
      * update the makefile rules to use the scatterfile and armlink
        to compile BL31
      * update pubsub.h to add sections to the scatterfile
      
      NOTE: THIS CHANGE HAS BEEN VERIFIED WITH TEGRA PLATFORMS ONLY.
      
      Change-Id: I7bb78b991c97d74a842e5635c74cb0b18e0fce67
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      c2ad38ce
  8. 05 Feb, 2019 1 commit
  9. 23 Jan, 2019 1 commit
  10. 18 Jan, 2019 2 commits
  11. 28 Sep, 2018 1 commit
  12. 30 Nov, 2017 1 commit
    • David Cunado's avatar
      Do not enable SVE on pre-v8.2 platforms · 3872fc2d
      David Cunado authored
      
      
      Pre-v8.2 platforms such as the Juno platform does not have
      the Scalable Vector Extensions implemented and so the build
      option ENABLE_SVE is set to zero.
      
      This has a minor performance improvement with no functional
      impact.
      
      Change-Id: Ib072735db7a0247406f8b60e325b7e28b1e04ad1
      Signed-off-by: default avatarDavid Cunado <david.cunado@arm.com>
      3872fc2d
  13. 23 Jun, 2017 1 commit
  14. 14 Jun, 2017 1 commit
  15. 03 May, 2017 1 commit
  16. 26 Apr, 2017 2 commits
  17. 07 Mar, 2017 1 commit
    • Varun Wadekar's avatar
      Tegra210: enable errata for Cortex-A57 and Cortex-A53 CPUs · 1f38d3c9
      Varun Wadekar authored
      
      
      This patch enables the following erratas for the Tegra210 SoC:
      
      * Cortex-A57
      =============
      - A57_DISABLE_NON_TEMPORAL_HINT
      - ERRATA_A57_826974
      - ERRATA_A57_826977
      - ERRATA_A57_828024
      - ERRATA_A57_829520
      - ERRATA_A57_833471
      
      * Cortex-A53
      =============
      - A53_DISABLE_NON_TEMPORAL_HINT
      - ERRATA_A53_826319
      - ERRATA_A53_836870
      
      Tegra210 uses Cortex-A57 revision: r1p1 and Cortex-A53 revision: r0p2.
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      1f38d3c9
  18. 27 Feb, 2017 1 commit
  19. 23 Feb, 2017 1 commit
  20. 04 Dec, 2015 1 commit
  21. 24 Jul, 2015 1 commit
  22. 29 May, 2015 1 commit
    • Varun Wadekar's avatar
      Support for NVIDIA's Tegra T210 SoCs · 08438e24
      Varun Wadekar authored
      
      
      T210 is the latest chip in the Tegra family of SoCs from NVIDIA. It is an
      ARM v8 dual-cluster (A57/A53) SoC, with any one of the clusters being active
      at a given point in time.
      
      This patch adds support to boot the Trusted Firmware on T210 SoCs. The patch
      also adds support to boot secondary CPUs, enter/exit core power states for
      all CPUs in the slow/fast clusters. The support to switch between clusters
      is still not available in this patch and would be available later.
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      08438e24
  23. 28 Apr, 2015 1 commit
    • Dan Handley's avatar
      Add common ARM and CSS platform code · b4315306
      Dan Handley authored
      This major change pulls out the common functionality from the
      FVP and Juno platform ports into the following categories:
      
      *   (include/)plat/common. Common platform porting functionality that
      typically may be used by all platforms.
      
      *   (include/)plat/arm/common. Common platform porting functionality
      that may be used by all ARM standard platforms. This includes all
      ARM development platforms like FVP and Juno but may also include
      non-ARM-owned platforms.
      
      *   (include/)plat/arm/board/common. Common platform porting
      functionality for ARM development platforms at the board
      (off SoC) level.
      
      *   (include/)plat/arm/css/common. Common platform porting
      functionality at the ARM Compute SubSystem (CSS) level. Juno
      is an example of a CSS-based platform.
      
      *   (include/)plat/arm/soc/common. Common platform porting
      functionality at the ARM SoC level, which is not already defined
      at the ARM CSS level.
      
      No guarantees are made about the backward compatibility of
      functionality provided in (include/)plat/arm.
      
      Also remove any unnecessary variation between the ARM development
      platform ports, including:
      
      *   Unify the way BL2 passes `bl31_params_t` to BL3-1. Use the
      Juno implementation, which copies the information from BL2 memory
      instead of expecting it to persist in shared memory.
      
      *   Unify the TZC configuration. There is no need to add a region
      for SCP in Juno; it's enough to simply not allow any access to
      this reserved region. Also set region 0 to provide no access by
      default instead of assuming this is the case.
      
      *   Unify the number of memory map regions required for ARM
      development platforms, although the actual ranges mapped for each
      platform may be different. For the FVP port, this reduces the
      mapped peripheral address space.
      
      These latter changes will only be observed when the platform ports
      are migrated to use the new common platform code in subsequent
      patches.
      
      Change-Id: Id9c269dd3dc6e74533d0e5116fdd826d53946dc8
      b4315306
  24. 31 Mar, 2015 1 commit
  25. 20 Aug, 2014 1 commit
    • Soby Mathew's avatar
      Introduce framework for CPU specific operations · 9b476841
      Soby Mathew authored
      This patch introduces a framework which will allow CPUs to perform
      implementation defined actions after a CPU reset, during a CPU or cluster power
      down, and when a crash occurs. CPU specific reset handlers have been implemented
      in this patch. Other handlers will be implemented in subsequent patches.
      
      Also moved cpu_helpers.S to the new directory lib/cpus/aarch64/.
      
      Change-Id: I1ca1bade4d101d11a898fb30fea2669f9b37b956
      9b476841
  26. 06 May, 2014 2 commits
    • Dan Handley's avatar
      Remove vpath usage in makefiles · bee82417
      Dan Handley authored
      Remove all usage of the vpath keyword in makefiles as it was prone
      to mistakes. Specify the relative paths to source files instead.
      
      Also reorder source files in makefiles alphabetically.
      
      Fixes ARM-software/tf-issues#121
      
      Change-Id: Id15f60655444bae60e0e2165259efac71a50928b
      bee82417
    • Dan Handley's avatar
      Move include and source files to logical locations · 4ecca339
      Dan Handley authored
      Move almost all system include files to a logical sub-directory
      under ./include. The only remaining system include directories
      not under ./include are specific to the platform. Move the
      corresponding source files to match the include directory
      structure.
      
      Also remove pm.h as it is no longer used.
      
      Change-Id: Ie5ea6368ec5fad459f3e8a802ad129135527f0b3
      4ecca339
  27. 26 Mar, 2014 1 commit
    • Sandrine Bailleux's avatar
      Separate out BL2, BL3-1 and BL3-2 early exception vectors from BL1 · 6c595b3d
      Sandrine Bailleux authored
      bl1/aarch64/early_exceptions.S used to be re-used by BL2, BL3-1 and
      BL3-2.  There was some early SMC handling code in there that was not
      required by the other bootloader stages.  Therefore this patch
      introduces an even simpler exception vector source file for BL2,
      BL3-1 and BL3-2.
      
      Fixes ARM-software/tf-issues#38
      
      Change-Id: I0244b80e9930b0f8035156a0bf91cc3e9a8f995d
      6c595b3d
  28. 20 Mar, 2014 1 commit
    • Jeenu Viswambharan's avatar
      Specify image entry in linker script · 9f98aa1a
      Jeenu Viswambharan authored
      At present, the entry point for each BL image is specified via the
      Makefiles and provided on the command line to the linker. When using a
      link script the entry point should rather be specified via the ENTRY()
      directive in the link script.
      
      This patch updates linker scripts of all BL images to specify the entry
      point using the ENTRY() directive. It also removes the --entry flag
      passed to the linker through Makefile.
      
      Fixes issue ARM-software/tf-issues#66
      
      Change-Id: I1369493ebbacea31885b51185441f6b628cf8da0
      9f98aa1a
  29. 05 Mar, 2014 1 commit
    • Jon Medhurst's avatar
      Update Makefiles to get proper dependency checking working. · 6d55d109
      Jon Medhurst authored
      
      
      This change requires all platforms to now specify a list of source files
      rather than object files.
      
      New source files should preferably be specified by using the path as
      well and we should add this in the future for all files so we can remove
      use of vpath. This is desirable because vpath hides issues like the fact
      that BL2 currently pulls in a BL1 file bl1/aarch64/early_exceptions.S
      and if in the future we added bl2/aarch64/early_exceptions.S then it's
      likely only one of the two version would be used for both bootloaders.
      
      This change also removes the 'dump' build target and simply gets
      bootloaders to always generate a dump file. At the same time the -x
      option is added so the section headers and symbols table are listed.
      
      Fixes ARM-software/tf-issues#11
      
      Change-Id: Ie38f7be76fed95756c8576cf3f3ea3b7015a18dc
      Signed-off-by: default avatarJon Medhurst <tixy@linaro.org>
      6d55d109
  30. 20 Feb, 2014 1 commit
    • Achin Gupta's avatar
      Factor out translation table setup in ARM FVP port · a0cd989d
      Achin Gupta authored
      This patch factors out the ARM FVP specific code to create MMU
      translation tables so that it is possible for a boot loader stage to
      create a different set of tables instead of using the default ones.
      The default translation tables are created with the assumption that
      the calling boot loader stage executes out of secure SRAM. This might
      not be true for the BL3_2 stage in the future.
      
      A boot loader stage can define the `fill_xlation_tables()` function as
      per its requirements. It returns a reference to the level 1
      translation table which is used by the common platform code to setup
      the TTBR_EL3.
      
      This patch is a temporary solution before a larger rework of
      translation table creation logic is introduced.
      
      Change-Id: I09a075d5da16822ee32a411a9dbe284718fb4ff6
      a0cd989d
  31. 20 Jan, 2014 2 commits
  32. 17 Jan, 2014 1 commit
  33. 20 Dec, 2013 1 commit
    • Harry Liebel's avatar
      Create local C library implementation (1/2) · c81b1d0f
      Harry Liebel authored
      - This change is split into two separate patches in order to
        simplify the history as interpreted by 'git'. The split is
        between the move/rename and addition of new files.
      - Remove dependency on toolchain C library headers and functions in
        order to ensure behavioural compatibility between toolchains.
      - Use FreeBSD as reference for C library implementation.
      - Do not let GCC use default library include paths.
      - Remove unused definitions in modified headers and implementations.
      - Move C library files to 'lib/stdlib' and 'include/stdlib'.
      - Break std.c functions out into separate files.
      
      Change-Id: I91cddfb3229775f770ad781589670c57d347a154
      c81b1d0f
  34. 05 Dec, 2013 1 commit
    • Dan Handley's avatar
      Enable third party contributions · ab2d31ed
      Dan Handley authored
      - Add instructions for contributing to ARM Trusted Firmware.
      
      - Update copyright text in all files to acknowledge contributors.
      
      Change-Id: I9311aac81b00c6c167d2f8c889aea403b84450e5
      ab2d31ed
  35. 25 Oct, 2013 1 commit