1. 10 Jul, 2021 1 commit
    • Pali Rohár's avatar
      fix(plat/marvell/a8k): Require that MV_DDR_PATH is correctly set · 528dafc3
      Pali Rohár authored
      
      
      Target mrvl_flash depends on external mv_ddr source code which is not
      part of TF-A project. Do not expect that it is pre-downloaded at some
      specific location and require user to specify correct path to mv_ddr
      source code via MV_DDR_PATH build option.
      
      TF-A code for Armada 37x0 platform also depends on mv_ddr source code
      and already requires passing correct MV_DDR_PATH build option.
      
      So for A8K implement same checks for validity of MV_DDR_PATH option as
      are already used by TF-A code for Armada 37x0 platform.
      Signed-off-by: default avatarPali Rohár <pali@kernel.org>
      Change-Id: I792f2bfeab0cec89b1b64e88d7b2c456e22de43a
      528dafc3
  2. 27 Apr, 2021 1 commit
    • Pali Rohár's avatar
      plat: marvell: armada: a3k: Add new compile option A3720_DB_PM_WAKEUP_SRC · f2800a47
      Pali Rohár authored
      
      
      This new compile option is only for Armada 3720 Development Board. When
      it is set to 1 then TF-A will setup PM wake up src configuration.
      
      By default this new option is disabled as it is board specific and no
      other A37xx board has PM wake up src configuration.
      
      Currently neither upstream U-Boot nor upstream Linux kernel has wakeup
      support for A37xx platforms, so having it disabled does not cause any
      issue.
      
      Prior this commit PM wake up src configuration specific for Armada 3720
      Development Board was enabled for every A37xx board. After this change it
      is enabled only when compiling with build flag A3720_DB_PM_WAKEUP_SRC=1
      Signed-off-by: default avatarPali Rohár <pali@kernel.org>
      Change-Id: I09fea1172c532df639acb3bb009cfde32d3c5766
      f2800a47
  3. 20 Apr, 2021 1 commit
  4. 09 Apr, 2021 1 commit
    • Pali Rohár's avatar
      docs: marvell: Add information about CZ.NIC Armada 3720 Secure Firmware · 4fe571b8
      Pali Rohár authored
      CZ.NIC as part of Turris project released free and open source WTMI
      application firmware 'wtmi_app.bin' for all Armada 3720 devices. This
      firmware includes additional features like access to Hardware Random
      Number Generator of Armada 3720 SoC which original Marvell's 'fuse.bin'
      image does not have.
      
      CZ.NIC's Armada 3720 Secure Firmware is available at website:
      
          https://gitlab.nic.cz/turris/mox-boot-builder/
      
      
      
      This change updates documentation to include steps how to build Marvell
      firmware image for Espressobin with this firmware to enable Hardware
      Random Number Generator on Espressobin.
      
      In this change is fixed also URL to TF-A and U-Boot git repositories in
      Espressobin build example. And as Marvell github repositories switched
      default branch to master, explicit branch via -b parameter is redundant
      and therefore from examples removed.
      Signed-off-by: default avatarPali Rohár <pali@kernel.org>
      Change-Id: I59ee29cb6ed149264c5e4202f2af8f9ab3859418
      4fe571b8
  5. 02 Feb, 2021 5 commits
  6. 29 Jan, 2021 4 commits
  7. 28 Jan, 2021 1 commit
  8. 26 Jan, 2021 1 commit
  9. 21 Jan, 2021 1 commit
  10. 14 Jan, 2021 1 commit
  11. 05 Jan, 2021 1 commit
    • Marek Behún's avatar
      plat: marvell: armada: a3k: support doing system reset via CM3 secure coprocessor · d9243f26
      Marek Behún authored
      
      
      Introduce a new build option CM3_SYSTEM_RESET for A3700 platform, which,
      when enabled, adds code to the PSCI reset handler to try to do system
      reset by the WTMI firmware running on the Cortex-M3 secure coprocessor.
      (This function is exposed via the mailbox interface.)
      
      The reason is that the Turris MOX board has a HW bug which causes reset
      to hang unpredictably. This issue can be solved by putting the board in
      a specific state before reset.
      Signed-off-by: default avatarMarek Behún <marek.behun@nic.cz>
      Change-Id: I3f60b9f244f334adcd33d6db6a361fbc8b8d209f
      d9243f26
  12. 19 Nov, 2020 1 commit
  13. 11 Oct, 2020 1 commit
  14. 04 Oct, 2020 1 commit
  15. 30 Jul, 2020 3 commits
  16. 10 Jul, 2020 1 commit
    • Konstantin Porotchkin's avatar
      plat: marvell: armada: a8k: change CCU LLC SRAM mapping · 0a977b9b
      Konstantin Porotchkin authored
      
      
      The LLC SRAM will be enabled in OP-TEE OS for usage as secure storage.
      The CCU have to prepare SRAM window, but point to the DRAM-0 target
      until the SRAM is actually enabled.
      This patch changes CCU SRAM window target to DRAM-0
      Remove dependence between LLC_SRAM and LLC_ENABLE and update the
      build documentation.
      The SRAМ base moved to follow the OP-TEE SHMEM area (0x05400000)
      
      Change-Id: I85c2434a3d515ec37da5ae8eb729e3280f91c456
      Signed-off-by: default avatarKonstantin Porotchkin <kostap@marvell.com>
      0a977b9b
  17. 19 Jun, 2020 1 commit
  18. 06 Jun, 2020 2 commits
  19. 08 Jan, 2020 1 commit
  20. 03 Jan, 2020 1 commit
  21. 27 Nov, 2019 1 commit
    • Paul Beesley's avatar
      doc: Split the User Guide into multiple files · 43f35ef5
      Paul Beesley authored
      
      
      The User Guide document has grown organically over time and
      now covers a wide range of topics, making it difficult to
      skim read and extract information from. Currently, it covers
      these topics and maybe a couple more:
      
      - Requirements (hardware, tools, libs)
      - Checking out the repo
      - Basic build instructions
      - A comprehensive list of build flags
      - FIP packaging
      - Building specifically for Juno
      - Firmware update images
      - EL3 payloads
      - Preloaded BL33 boot flow
      - Running on FVPs
      - Running on Juno
      
      I have separated these out into a few groups that become new
      documents. Broadly speaking, build instructions for the tools,
      for TF-A generally, and for specific scenarios are separated.
      Content relating to specific platforms (Juno and the FVPs are
      Arm-specific platforms, essentially) has been moved into the
      documentation that is specific to those platforms, under
      docs/plat/arm.
      
      Change-Id: Ica87c52d8cd4f577332be0b0738998ea3ba3bbec
      Signed-off-by: default avatarPaul Beesley <paul.beesley@arm.com>
      43f35ef5
  22. 11 Oct, 2019 1 commit
  23. 20 Sep, 2019 1 commit
    • Paul Beesley's avatar
      doc: Render Marvell platform documents · 2966defa
      Paul Beesley authored
      
      
      The documentation for Marvell platforms was not included in the
      rendered document output until now because, while it was mostly
      valid RST format, the files were saved with a .txt extension.
      
      This patch corrects some RST formatting errors, creates a document
      tree (index page) for the Marvell documents, and adds the Marvell
      subtree to the main index.
      
      Change-Id: Id7d4ac37eded636f8f62322a153e1e5f652ff51a
      Signed-off-by: default avatarPaul Beesley <paul.beesley@arm.com>
      2966defa
  24. 21 May, 2019 1 commit
    • Paul Beesley's avatar
      doc: Move documents into subdirectories · 40d553cf
      Paul Beesley authored
      
      
      This change creates the following directories under docs/
      in order to provide a grouping for the content:
      
      - components
      - design
      - getting_started
      - perf
      - process
      
      In each of these directories an index.rst file is created
      and this serves as an index / landing page for each of the
      groups when the pages are compiled. Proper layout of the
      top-level table of contents relies on this directory/index
      structure.
      
      Without this patch it is possible to build the documents
      correctly with Sphinx but the output looks messy because
      there is no overall hierarchy.
      
      Change-Id: I3c9f4443ec98571a56a6edf775f2c8d74d7f429f
      Signed-off-by: default avatarPaul Beesley <paul.beesley@arm.com>
      40d553cf