- 30 Aug, 2018 7 commits
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Bryan O'Donoghue authored
- Adds a simple register read/write abstraction to cut-down on the amount of typing and text required to access UART registers in this driver. - Adds a console getc() callback. - Adds a console putc() callback, translating '\n' to '\r' + '\n'. - Initializes the MXC UART, take a crude method of calculating the BAUD rate generator. The UART clock-gates must have been enabled prior to launching the UART init code. Special care needs to be taken to ensure the UBIR is initialized before the UBMR and we need to ensure that UCR2.SRST comes good before trying to program other registers associated with the UART. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
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Antonio Nino Diaz authored
Change-Id: Ifdb0ceec19d267b14d796b5d31f08f7342190484 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: I2954a99d5b72069bcb7bac9d6926c6209d6ba881 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: I08447b44fffb6e54f9fab957eee369ccbda4247a Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: I6a2adef87c20f9279446a54b7e69618fba3d2a25 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: I945029ca26ea2e63f0d92c5f33019b882f23bd72 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: Ib587f12f36810fc7d4f4b8f575195554299b8ed4 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 22 Aug, 2018 1 commit
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Antonio Nino Diaz authored
tf_printf and tf_snprintf are now called printf and snprintf, so the code needs to be updated. Change-Id: Iffeee97afcd6328c4c2d30830d4923b964682d71 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 15 Aug, 2018 1 commit
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Sathees Balya authored
This allows the console drivers to be implemented in C Change-Id: Ibac859c4bcef0e92a0dcacc6b58ac19bc69b8342 Signed-off-by: Sathees Balya <sathees.balya@arm.com>
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- 13 Aug, 2018 1 commit
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Roberto Vargas authored
The CCI500 TRM explicitily requires completion of the write operation before the read operation, and it is not guaranteed by dmb but it is dsb. Change-Id: Ieeaa0d1a4b8fcb87108dea9b6de03d9c8a150829 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 10 Aug, 2018 8 commits
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Antonio Nino Diaz authored
Because of -Werror, this causes a build error. Change-Id: I37a8c4bbfe3f2ced5e17981a2814985919ad483b Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Haojian Zhuang authored
Replace emmc framework by mmc framework. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
Migrate dw_mmc driver from emmc framework to mmc framework. The emmc framework will be abandoned. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
It should set buswidth and speed of mmc controller before accessing mmc. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
DMA is always used in mmc driver. So the buffer address should always follow the DMA limitation. There're same requirement in mmc_read_blocks()/mmc_write_blocks() on parameter buf. Since parameter buf comes from io_block driver, it's already handled in io_block driver. At here, just make the minimum address alignment on 16 chars. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
mmc_read_blocks()/mmc_write_blocks() derived from io_block_ops_t type. It means that lba param should be integer type, not unsigned integer type. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
Sending CMD8 before CMD1 just causes to fetch data failure in eMMC. Check whether it's eMMC first. If it's eMMC, send CMD1 command instead. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Antonio Nino Diaz authored
Functions provided by stdio.h such as printf and sprintf are available in the codebase, but they add a lot of code to the final image if they are used: - AArch64: ~4KB - AArch32: ~2KB in T32, ~3KB in A32 tf_printf and tf_snprintf are a lot more simple, but it is preferable to use them when possible because they are also used in common code. Change-Id: Id09fd2b486198fe3d79276e2c27931595b7ba60e Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 03 Aug, 2018 3 commits
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Roberto Vargas authored
We had exit but we didn't have atexit, and we were calling panic and tf_printf from exit, which generated a dependency from exit to them. Having atexit allows to set a different function pointer in every image. Change-Id: I95b9556d680d96249ed3b14da159b6f417da7661 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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Roberto Vargas authored
Mbebtls include paths are controlled by the user using the variable MBEDTLS_DIR and they are out of the TF source tree. Since these includes have a different origin it is better to move them to a different variable. This change makes easier for the romlib Makefile to parse the include paths. Change-Id: I3e4c99300f1012bc7f88c6b9f5bc0ec1f7b5aa8d Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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Roberto Vargas authored
TF Makefile was linking all the objects files generated for the Mbed TLS library instead of creating a static library that could be used in the linking stage. Change-Id: I8e4cd843ef56033c9d3faeee71601d110b7e4c12 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 02 Aug, 2018 1 commit
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Yann Gautier authored
A new function mmc_reset_to_idle is also created. Signed-off-by: Yann Gautier <yann.gautier@st.com>
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- 30 Jul, 2018 1 commit
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Antonio Nino Diaz authored
Fix violations of MISRA C-2012 Rules 10.1, 10.3 and 10.4. Change-Id: I13c6acda798c1666892f630f097a23e68748f9e4 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 26 Jul, 2018 1 commit
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Andrew F. Davis authored
When a platform enables its caches before it initializes the GICC/GICR interface then explicit cache maintenance is not needed. Remove these here. Signed-off-by: Andrew F. Davis <afd@ti.com>
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- 24 Jul, 2018 6 commits
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Yann Gautier authored
The DDR driver is under dual license, BSD and GPLv2. The configuration parameters are taken from device tree. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
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Yann Gautier authored
If a PMIC companion chip is present on board, it has to be configured for regulators supplies. This check is done with board DT configuration. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Pascal Paillet <p.paillet@st.com>
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Yann Gautier authored
Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
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Yann Gautier authored
The management of pinctrl nodes of device tree is also added. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Mathieu Belou <mathieu.belou@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
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Yann Gautier authored
The clock driver is under dual license, BSD and GPLv2. The clock driver uses device tree, so a minimal support for this is added. The required files for driver and DTS files are in include/dt-bindings/. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
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Yann Gautier authored
STM32MP1 is a microprocessor designed by STMicroelectronics, based on a dual Arm Cortex-A7. It is an Armv7-A platform, using dedicated code from TF-A. STM32MP1 uses BL2 compiled with BL2_AT_EL3. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Mathieu Belou <mathieu.belou@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Pascal Paillet <p.paillet@st.com>
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- 19 Jul, 2018 1 commit
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Roberto Vargas authored
The functions cci_enable_snoop_dvm_reqs and cci_disable_snoop_dvm_reqs write in the SNOOP_CTRL_REGISTER of the slave interface and it polls the status register to be sure that the operation is finished before leaving the functions. If the write in SNOOP_CTRL_REGISTER is reordered after the first read in the status register then these functions can finish before enabling/disabling snoops and DVM messages. The CCI500 TRM specifies: Wait for the completion of the write to the Snoop Control Register before testing the change_pending bit. Change-Id: Idc7685963f412be1c16bcd3c6e3cca826e2fdf38 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 18 Jul, 2018 7 commits
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Konstantin Porotchkin authored
Remove assert on buffer address equal zero. Marvell uses address 0x0 for loading BL33, so this check is irrelevant and breaks the debug builds on Marvell platforms. Change-Id: Ie56a51138e2e4ddd8986dd7036797dc2d8b10125 Signed-off-by: Haim Boot <hayim@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/54589
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Konstantin Porotchkin authored
Add i2c driver for A8K SoC family. Change-Id: I5932b2fce286d84fc3ad5a74c4c456001faa3196 Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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Konstantin Porotchkin authored
Add COMPHY driver for usage in a runtime service. Change-Id: I6fb42d0a099496d5699ee24684ae2b93ed35770b Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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Konstantin Porotchkin authored
Add thermal driver for A8K SoC family. The termal unit data is used by Marvell DRAM initialization code for optimizing the memory controller configuration Change-Id: Iad92689fa6e4224a89d872e9aa015393abd9cf73 Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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Konstantin Porotchkin authored
Add LLC (L3) cache management drivers for Marvell SoCs AP806, AP807 and AP810 Change-Id: Ic70710f9bc5b6b48395d62212df7011e2fbb5894 Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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Konstantin Porotchkin authored
Add ModularChip and MCI drivers for A8K SoC family. ModularChip drivers include support for the internal building blocks of Marvell ARMADA SoCs - APN806, APN807 and CP110 Change-Id: I9559343788fa2e5eb47e6384a4a7d47408787c02 Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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Konstantin Porotchkin authored
Add address decoding unit drivers for Marvell SoCs. Address decoding flow and address translation units chart are located at docs/marvell/misc/mvebu-a8k-addr-map.txt Change-Id: Id6ce311fa1f4f112df3adfac5d20449f495f71ed Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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- 03 Jul, 2018 1 commit
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Yann Gautier authored
This change is largely based on existing eMMC framework by Haojian Zhuang (@hzhuang1). The MMC framework supports both eMMC and SD card devices. It was written as a new framework since breaking few eMMC framework APIs. At card probe and after the reset to idle command (CMD0), a Send Interface Condition Command is sent (CMD8) to distinguish between eMMC and SD card devices. eMMC devices go through the same sequence as in the former eMMC framework. Else the framework uses commands dedicated to SD-cards for init or frequency switch. A structure is created to share info with the driver. It stores: - the MMC type (eMMC, SD or SD HC) - the device size - the max frequency supported by the device - the block size: 512 for eMMC and SD-HC and read from CSD structure for older SD-cards Restriction to align buffers on block size has been removed. Cache maintenance was removed and is expected to be done in the platform or device driver. The MMC framework includes some MISRA compliance coding style maybe not yet ported in the existing eMMC framework. Fixes ARM-software/tf-issues#597 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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- 02 Jul, 2018 1 commit
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Ruchika Gupta authored
Platform can define MAX_NUM_FIP_DEVICES in platform_def.h to define the number of FIP io devices. The FIP driver doesn't support muliple open file. So only one single file can be open at a time across multiple FIP devices. For any FIP device, an image should be loaded fully before moving on to the next image. Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
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