- 05 May, 2017 1 commit
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davidcunado-arm authored
Fix execute-never permissions in xlat tables libs
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- 04 May, 2017 1 commit
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davidcunado-arm authored
Use SPDX license identifiers
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- 03 May, 2017 1 commit
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dp-arm authored
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file. NOTE: Files that have been imported by FreeBSD have not been modified. [0]: https://spdx.org/ Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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- 02 May, 2017 6 commits
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davidcunado-arm authored
Update terminology: standard SMC to yielding SMC
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Antonio Nino Diaz authored
Translation regimes that only support one virtual address space (such as the ones for EL2 and EL3) can flag memory regions as execute-never by setting to 1 the XN bit in the Upper Attributes field in the translation tables descriptors. Translation regimes that support two different virtual address spaces (such as the one shared by EL1 and EL0) use bits PXN and UXN instead. The Trusted Firmware runs at EL3 and EL1, it has to handle translation tables of both translation regimes, but the previous code handled both regimes the same way, as if both had only 1 VA range. When trying to set a descriptor as execute-never it would set the XN bit correctly in EL3, but it would set the XN bit in EL1 as well. XN is at the same bit position as UXN, which means that EL0 was being prevented from executing code at this region, not EL1 as the code intended. Therefore, the PXN bit was unset to 0 all the time. The result is that, in AArch64 mode, read-only data sections of BL2 weren't protected from being executed. This patch adds support of translation regimes with two virtual address spaces to both versions of the translation tables library, fixing the execute-never permissions for translation tables in EL1. The library currently does not support initializing translation tables for EL0 software, therefore it does not set/unset the UXN bit. If EL1 software needs to initialize translation tables for EL0 software, it should use a different library instead. Change-Id: If27588f9820ff42988851d90dc92801c8ecbe0c9 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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davidcunado-arm authored
xlat lib: Don't set mmap_attr_t enum to be -1
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Nishanth Menon authored
-1 is not a defined mmap_attr_t type. Instead of using invalid enum types, we can either choose to define a INVALID type OR handle the condition specifically. Since the usage of mmap_region_attr is limited, it is easier to just handle the error condition specifically and return 0 or -1 depending on success or fail. Fixes: ARM-Software/tf-issues#473 Fixes: 28fa2e9e ("xlat lib: Use mmap_attr_t type consistently") Signed-off-by: Nishanth Menon <nm@ti.com>
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davidcunado-arm authored
Move defines in utils.h to utils_def.h to fix shared header compile i…
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davidcunado-arm authored
Tegra fixes from downstream
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- 01 May, 2017 7 commits
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Varun Wadekar authored
This patch implements the handler to calculate the cluster and system power states for the Tegra210 SoC. The power states returned by this handler are used by the PSCI library to decide cache maintenance operations - cluster v cpu. Change-Id: I93e4139d4cd8a086b51f328e9a76e91428ebcdab Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Varun Wadekar authored
This patch fixes the logic used to calculate the end of NS memory aperture. The functions allows zero sized NS apertures as that is a valid requirement for some use cases. e.g. VPR resize. Change-Id: Ie966e0ea2f9c6888d21c38e734003704094b3720 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Varun Wadekar authored
The video memory carveout has to be re-sized depending on the Video content. This requires the NS world to send us new base/size values. Before setting up the new region, we must zero out the previous memory region, so that the video frames are not leaked to the outside world. This patch adds the logic to zero out the previous memory carveout region. Change-Id: I471167ef7747154440df5c1a5e015fbeb69d9043 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Varun Wadekar authored
Earlier, we were setting "System Suspend" as the power state for all system states. This caused incorrect system state during a cluster power down. This patch fixes this anomaly and sets the correct power state during a cluster/system power down. Change-Id: Ibd002930e0ae103e381e0a19670c3c4d057e7cb7 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Steven Kao authored
This patch adds max retries for all ARI requests and asserts if the ARI request is still busy. Change-Id: I454ad9b557bb59e513e4c0c6f071275c87d0e07a Signed-off-by: Steven Kao <skao@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Steven Kao authored
This patch adds the Tegra micro-seconds controller to the memory map. This allows us to use the delay_timer functionality. Change-Id: Ia8b148a871949bfede539974cacbe0e93ec7e77c Signed-off-by: Steven Kao <skao@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Steven Kao authored
This patch moves the platform delay timer init to early BL31 platform setup, so that platforms can use the udelay/mdelay routines in the early init code. Change-Id: I6fe20b76176ea22589539c180c5b6f9d09eda8de Signed-off-by: Steven Kao <skao@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 29 Apr, 2017 2 commits
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Scott Branden authored
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Scott Branden authored
utils.h is included in various header files for the defines in it. Some of the other header files only contain defines. This allows the header files to be shared between host and target builds for shared defines. Recently types.h has been included in utils.h as well as some function prototypes. Because of the inclusion of types.h conflicts exist building host tools abd these header files now. To solve this problem, move the defines to utils_def.h and have this included by utils.h and change header files to only include utils_def.h and not pick up the new types.h being introduced. Fixes ARM-software/tf-issues#461 Signed-off-by: Scott Branden <scott.branden@broadcom.com> Remove utils_def.h from utils.h This patch removes utils_def.h from utils.h as it is not required. And also makes a minor change to ensure Juno platform compiles. Change-Id: I10cf1fb51e44a8fa6dcec02980354eb9ecc9fa29
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- 27 Apr, 2017 1 commit
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davidcunado-arm authored
Asserts release nvidia
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- 26 Apr, 2017 8 commits
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Antonio Nino Diaz authored
One assert depends on code that is conditionally compiled based on the DEBUG define. This patch modifies the conditional inclusion of such code so that it is based on the ENABLE_ASSERTIONS build option. Change-Id: Ic5659a3db8632593b9d2e83dac6d30afd87c131d Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Varun Wadekar authored
This patch enables the assert in the context save routine by default, for all flavours of the build. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Varun Wadekar authored
This patch changes the platform Makefile to set `ENABLE_ASSERTIONS` to 1 instead of the deprecated option `ASM_ASSERTION`. This also pulls in C assertions in release mode. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Varun Wadekar authored
This patch groups all the platform configuration macros into the common platform.mk makefile. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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davidcunado-arm authored
CSS: Allow system suspend only via PSCI SYSTEM_SUSPEND API
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David Cunado authored
Since Issue B (November 2016) of the SMC Calling Convention document standard SMC calls are renamed to yielding SMC calls to help avoid confusion with the standard service SMC range, which remains unchanged. http://infocenter.arm.com/help/topic/com.arm.doc.den0028b/ARM_DEN0028B_SMC_Calling_Convention.pdf This patch adds a new define for yielding SMC call type and deprecates the current standard SMC call type. The tsp is migrated to use this new terminology and, additionally, the documentation and code comments are updated to use this new terminology. Change-Id: I0d7cc0224667ee6c050af976745f18c55906a793 Signed-off-by: David Cunado <david.cunado@arm.com>
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davidcunado-arm authored
tspd:FWU:Fix usage of SMC_RET0
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davidcunado-arm authored
drivers: ti: uart: remove UART_FCR read-modify-write
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- 25 Apr, 2017 2 commits
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davidcunado-arm authored
fiptool: Support non-decimal --align arguments
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davidcunado-arm authored
lib: stdbool header from the FreeBSD project
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- 24 Apr, 2017 4 commits
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davidcunado-arm authored
Minor refactor of BL2 image load v2
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davidcunado-arm authored
xlat lib: Use mmap_attr_t type consistently
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Soby Mathew authored
The CSS power management layer previously allowed to suspend system power domain level via both PSCI CPU_SUSPEND and PSCI SYSTEM_SUSPEND APIs. System suspend via PSCI CPU_SUSPEND was always problematic to support because of issues with targeting wakeup interrupts to suspended cores before the per-cpu GIC initialization is done. This is not the case for PSCI SYSTEM_SUSPEND API because all the other cores are expected to be offlined prior to issuing system suspend and PSCI CPU_ON explicit calls will be made to power them on. Hence the Juno platform used to downgrade the PSCI CPU_SUSPEND request for system power domain level to cluster level by overriding the default `plat_psci_pm_ops` exported by CSS layer. Given the direction the new CSS platforms are evolving, it is best to limit the system suspend only via PSCI SYSTEM_SUSPEND API for all CSS platforms. This patch makes changes to allow system suspend only via PSCI SYSTEM_SUSPEND API. The override of `plat_psci_ops` for Juno is removed. Change-Id: Idb30eaad04890dd46074e9e888caeedc50a4b533 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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Andreas Färber authored
An alignment value of 0x4000 is much easier to type than 16384, so enhance get_image_align() to recognize a 0x prefix for hexadecimals. Signed-off-by: Andreas Färber <afaerber@suse.de>
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- 21 Apr, 2017 7 commits
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Varun Wadekar authored
This patch removes the code that touched UART_FCR, from console_core_putc(). The check for whether transmit FIFO is full is sufficient before writing to UART TX FIFO. In fact setting UARTFCR_TXCLR immediately after a byte is written to FIFO might even result in loss of that byte, if UART hasn't sent that byte out yet. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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davidcunado-arm authored
Tegra: smmu: make the context save sequence robust
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davidcunado-arm authored
Add AArch32 support for Juno
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davidcunado-arm authored
Tegra186: Support AARCH32/64 encoding for MCE calls
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davidcunado-arm authored
PSCI: Build option to enable D-Caches early in warmboot
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davidcunado-arm authored
ARM platforms: Add option to use xlat tables lib v1
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davidcunado-arm authored
Add `ENABLE_ASSERTIONS` build option
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