1. 04 Sep, 2018 1 commit
    • John Tsichritzis's avatar
      Prepare Mbed TLS drivers for shared heap · 6d01a463
      John Tsichritzis authored
      
      
      The Mbed TLS drivers, in order to work, need a heap for internal usage.
      This heap, instead of being directly referenced by the drivers, now it
      is being accessed indirectly through a pointer. Also, the heap, instead
      of being part of the drivers, now it is being received through the
      plat_get_mbedtls_heap() function. This function requests a heap from the
      current BL image which utilises the Mbed TLS drivers.
      
      Those changes create the opportunity for the Mbed TLS heap to be shared
      among different images, thus saving memory. A default heap
      implementation is provided but it can be overridden by a platform
      specific, optimised implemenetation.
      
      Change-Id: I286a1f10097a9cdcbcd312201eea576c18d157fa
      Signed-off-by: default avatarJohn Tsichritzis <john.tsichritzis@arm.com>
      6d01a463
  2. 30 Aug, 2018 6 commits
  3. 22 Aug, 2018 1 commit
  4. 15 Aug, 2018 1 commit
  5. 13 Aug, 2018 1 commit
  6. 10 Aug, 2018 8 commits
  7. 03 Aug, 2018 3 commits
  8. 02 Aug, 2018 1 commit
  9. 30 Jul, 2018 1 commit
  10. 26 Jul, 2018 1 commit
  11. 24 Jul, 2018 6 commits
  12. 19 Jul, 2018 1 commit
    • Roberto Vargas's avatar
      cci: Wait before reading status register · ae551a13
      Roberto Vargas authored
      
      
      The functions cci_enable_snoop_dvm_reqs and cci_disable_snoop_dvm_reqs write
      in the SNOOP_CTRL_REGISTER of the slave interface and it polls the status
      register to be sure that the operation is finished before leaving the
      functions. If the write in SNOOP_CTRL_REGISTER is reordered after the first
      read in the status register then these functions can finish before
      enabling/disabling snoops and DVM messages.
      
      The CCI500 TRM specifies:
      
      	Wait for the completion of the write to the Snoop Control Register
      	before testing the change_pending bit.
      
      Change-Id: Idc7685963f412be1c16bcd3c6e3cca826e2fdf38
      Signed-off-by: default avatarRoberto Vargas <roberto.vargas@arm.com>
      ae551a13
  13. 18 Jul, 2018 7 commits
  14. 03 Jul, 2018 1 commit
    • Yann Gautier's avatar
      Add MMC framework · ad71d45e
      Yann Gautier authored
      
      
      This change is largely based on existing eMMC framework by Haojian Zhuang
      (@hzhuang1).
      
      The MMC framework supports both eMMC and SD card devices. It was
      written as a new framework since breaking few eMMC framework APIs.
      
      At card probe and after the reset to idle command (CMD0), a Send
      Interface Condition Command is sent (CMD8) to distinguish between
      eMMC and SD card devices. eMMC devices go through the same
      sequence as in the former eMMC framework. Else the framework
      uses commands dedicated to SD-cards for init or frequency switch.
      
      A structure is created to share info with the driver. It stores:
      - the MMC type (eMMC, SD or SD HC)
      - the device size
      - the max frequency supported by the device
      - the block size: 512 for eMMC and SD-HC and read from CSD
       structure for older SD-cards
      
      Restriction to align buffers on block size has been removed.
      Cache maintenance was removed and is expected to be done in the platform
      or device driver.
      
      The MMC framework includes some MISRA compliance coding style
      maybe not yet ported in the existing eMMC framework.
      
      Fixes ARM-software/tf-issues#597
      Signed-off-by: default avatarYann Gautier <yann.gautier@st.com>
      ad71d45e
  15. 02 Jul, 2018 1 commit