- 17 Oct, 2018 1 commit
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Jorge Ramirez-Ortiz authored
Reference code: ============== rar_gen3: IPL and Secure Monitor Rev1.0.22 https://github.com/renesas-rcar/arm-trusted-firmware [rcar_gen3] Author: Takuya Sakata <takuya.sakata.wz@bp.renesas.com> Date: Thu Aug 30 21:26:41 2018 +0900 Update IPL and Secure Monitor Rev1.0.22 General Information: =================== This port has been tested on the Salvator-X Soc_id r8a7795 revision ES1.1 (uses an SPD). Build Tested: ------------- ATFW_OPT="LSI=H3 RCAR_DRAM_SPLIT=1 RCAR_LOSSY_ENABLE=1" MBEDTLS_DIR=$mbedtls $ make clean bl2 bl31 rcar PLAT=rcar ${ATFW_OPT} SPD=opteed Other dependencies: ------------------ * mbed_tls: git@github.com:ARMmbed/mbedtls.git [devel] Merge: 68dbc94 f34a4c1 Author: Simon Butcher <simon.butcher@arm.com> Date: Thu Aug 30 00:57:28 2018 +0100 * optee_os: https://github.com/BayLibre/optee_os Until it gets merged into OP-TEE, the port requires Renesas' Trusted Environment with a modification to support power management. Author: Jorge Ramirez-Ortiz <jramirez@baylibre.com> Date: Thu Aug 30 16:49:49 2018 +0200 plat-rcar: cpu-suspend: handle the power level Signed-off-by: Jorge Ramirez-Ortiz <jramirez@baylibre.com> * u-boot: The port has beent tested using mainline uboot. Author: Fabio Estevam <festevam@gmail.com> Date: Tue Sep 4 10:23:12 2018 -0300 *linux: The port has beent tested using mainline kernel. Author: Linus Torvalds <torvalds@linux-foundation.org> Date: Sun Sep 16 11:52:37 2018 -0700 Linux 4.19-rc4 Overview --------- BOOTROM starts the cpu at EL3; In this port BL2 will therefore be entered at this exception level (the Renesas' ATF reference tree [1] resets into EL1 before entering BL2 - see its bl2.ld.S) BL2 initializes DDR (and i2c to talk to the PMIC on some platforms) before determining the boot reason (cold or warm). During suspend all CPUs are switched off and the DDR is put in backup mode (some kind of self-refresh mode). This means that BL2 is always entered in a cold boot scenario. Once BL2 boots, it determines the boot reason, writes it to shared memory (BOOT_KIND_BASE) together with the BL31 parameters (PARAMS_BASE) and jumps to BL31. To all effects, BL31 is as if it is being entered in reset mode since it still needs to initialize the rest of the cores; this is the reason behind using direct shared memory access to BOOT_KIND_BASE and PARAMS_BASE instead of using registers to get to those locations (see el3_common_macros.S and bl31_entrypoint.S for the RESET_TO_BL31 use case). Depending on the boot reason BL31 initializes the rest of the cores: in case of suspend, it uses a MBOX memory region to recover the program counters. [1] https://github.com/renesas-rcar/arm-trusted-firmware Tests ----- * cpuidle ------- enable kernel's cpuidle arm_idle driver and boot * system suspend -------------- $ cat suspend.sh #!/bin/bash i2cset -f -y 7 0x30 0x20 0x0F read -p "Switch off SW23 and press return " foo echo mem > /sys/power/state * cpu hotplug: ------------ $ cat offline.sh #!/bin/bash nbr=$1 echo 0 > /sys/devices/system/cpu/cpu$nbr/online printf "ONLINE: " && cat /sys/devices/system/cpu/online printf "OFFLINE: " && cat /sys/devices/system/cpu/offline $ cat online.sh #!/bin/bash nbr=$1 echo 1 > /sys/devices/system/cpu/cpu$nbr/online printf "ONLINE: " && cat /sys/devices/system/cpu/online printf "OFFLINE: " && cat /sys/devices/system/cpu/offline Signed-off-by: ldts <jramirez@baylibre.com>
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- 12 Oct, 2018 8 commits
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Dimitris Papastamos authored
drivers: partition: correct compilation error in VERBOSE mode
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Dimitris Papastamos authored
Introduce object pool allocator
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Dimitris Papastamos authored
pl011: cnds: cbmem: 16550: Fix comments
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Antonio Nino Diaz authored
The comments with the prototypes of the register functions of the console drivers are incorrect. The arguments are wrong. This patch fixes them. Change-Id: I38c4b481ee69e840780111c42f03c0752eb6315c Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Soby Mathew authored
Makefile: Support totally quiet output with -s
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Soby Mathew authored
plat/arm: Fix misra warnings in platform code
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Soby Mathew authored
drivers: imx: mxc_usdhc: Do not set MMC_RSP_48 for MMC_RESPONSE_R2
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Soby Mathew authored
PSCI cache flush and comment fixup
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- 11 Oct, 2018 8 commits
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Sathees Balya authored
Change-Id: Ica944acc474a099219d50b041cfaeabd4f3d362f Signed-off-by: Sathees Balya <sathees.balya@arm.com>
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Sandrine Bailleux authored
The object pool allocator provides a simplistic interface to manage allocation in a fixed-size static array. The caller creates a static "object pool" out of such an array and may then call pool_alloc() to get the next available object within the pool. There is also a variant to get multiple consecutive objects: pool_alloc_n(). Note that this interface does not provide any way to free the objects afterwards. This is by design and it is not a limitation. We do not want to introduce complexity induced by memory freeing, such as use-after-free bugs, memory fragmentation and so on. Change-Id: Iefc2e153767851fbde5841a295f92ae48adda71f Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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Yann Gautier authored
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Soby Mathew authored
psci: platform control of SYSTEM_SUSPEND entry
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Soby Mathew authored
Various corrections of typos
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Soby Mathew authored
plat/arm: Move norflash driver to drivers/ folder
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ldts authored
Some platforms can only resume from system suspend from the boot CPU, hence they should only enter that state from that same core. The following commit presents an interface that allows the platform to reject system suspend entry near its very last stage (last CPU).
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Soby Mathew authored
plat/arm: allow RESET_TO_BL31 for CSS-based platforms
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- 10 Oct, 2018 15 commits
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Andrew F. Davis authored
When a platform enables its caches before it accesses the psci_non_cpu_pd_nodes structure then explicit cache maintenance is not needed. Signed-off-by: Andrew F. Davis <afd@ti.com>
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Andrew F. Davis authored
The MMU is not disabled in this path, update the comment to reflect this. Also clarify that both paths call prepare_cpu_pwr_dwn(), but the second path does stack cache maintenance. Signed-off-by: Andrew F. Davis <afd@ti.com>
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Soby Mathew authored
Fix service CPU image load at BL2 stage and update maintainers list
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Soby Mathew authored
tools: Make invocation of host compiler correct
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Soby Mathew authored
plat/arm/css/sgm: Reorder early platform init
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Soby Mathew authored
doimage: get rid of non null terminated strings by strncpy
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Bryan O'Donoghue authored
commit 97d5db8c reverts an update to the MMC layer that accompanied the original submission of this MMC driver this is the right-thing-to-do in terms of the MMC spec. Unfortunately the reversion also breaks this driver. The issue is the i.MX controller doesn't want MMC_RSP_48 set for MMC_RESPONSE_R2. The appropriate place to place that constraint is obviously in drivers/imx/usdhc/imx_usdhc.c not in the shared MMC codebase. This patch restores the logic the i.MX controller requires without breaking it for everyone else. Fixes: 97d5db8c Fixes: 2a82a9c9 Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Cc: Jun Nie <jun.nie@linaro.org>
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John Tsichritzis authored
Change-Id: Icc6fb03abb9b4ef85931b9e3d767b5a9c271b5f3 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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John Tsichritzis authored
Change-Id: I1ce771a155e6e83885a00d2f05591bf98cd69854 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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John Tsichritzis authored
The "Secure" prefix (S-ELx) is valid only for S-EL0 and S-EL1 but is meaningless for EL3, since EL3 is always secure. Hence, the "S" prefix has been removed from wherever it was used as "S-EL3". Change-Id: Icdeac9506d763f9f83d7297c7113aec7b85e9dbe Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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John Tsichritzis authored
The definitions of the logging macros are reordered to be consistent with the definitions of the log levels. Change-Id: I6ff07b93eb64786ff147d39014d1c8e15db28444 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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Girish Pathak authored
In the function, bl1_early_platform_setup in the file plat/arm/css/sgm/sgm_bl1_setup.c: plat_config_init(); arm_bl1_early_platform_setup(); The debug messages logged by plat_config_init() are lost because the console is initialized in the function arm_bl1_early_platform_setup() To see the logs of plat_config_init, this fix re-orders above calls so that the console is initialized before call to plat_config_init. Change-Id: I2e98f1f67c591cca24e28905acd0838ea3697a7c Signed-off-by: Girish Pathak <girish.pathak@arm.com>
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Soby Mathew authored
Fix misra warnings in SMC and power mgmt code
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Antonio Nino Diaz authored
This way it can be reused by other platforms if needed. Note that this driver is designed to work with the Versatile Express NOR flash of Juno and FVP. In said platforms, the memory is organized as an interleaved memory of two chips with a 16 bit word. Any platform that wishes to reuse it with a different configuration will need to modify the driver so that it is more generic. Change-Id: Ic721758425864e0cf42b7b9b04bf0d9513b6022e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Deepak Pandey authored
This lets any future CSS platforms to use RESET_TO_BL31 flag. Change-Id: I32a90fce43cb0c6f4d33589653a0fd6a7ecc9577 Signed-off-by: Deepak Pandey <Deepak.Pandey@arm.com>
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- 09 Oct, 2018 1 commit
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Sathees Balya authored
Change-Id: Ia00eba2b18804e6498d935d33ec104953e0e5e03 Signed-off-by: Sathees Balya <sathees.balya@arm.com>
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- 08 Oct, 2018 3 commits
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Dimitris Papastamos authored
xlat: Fix checks in mmap_add() and mmap_add_ctx()
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Antonio Nino Diaz authored
Commit 79621f00 broke sgi575. It is possible to have a region with 0 as value for the attributes. It means device memory, read only, secure, executable. This is legitimate if the code is in flash and the code is executed from there. This is the case for SGI_MAP_FLASH0_RO, defined in the file plat/arm/css/sgi/sgi_plat.c. This problem is solved by checking both size and attributes in xlat v1. In xlat v2, it is enough to check the granularity, as it can never be 0. Change-Id: I7be11f1b0e51c4c2ffd560b4a6cdfbf15de2c276 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Andre Przywara authored
"-s" is a command line option to the make tool, to suppress normal output, something to the effect of prepending every line with '@' in the Makefile. However with our V={0|1} support, we now print the shortened command line output in any case (even with V=1, in addition to the long line!). Normally -s helps to not miss non-fatal warnings, which tend to scroll out of the window easily. Introduce a new Makefile variable ECHO, to control the shortened output. We only set it in the (current default) V=0 case, and replace every occurence of "@echo" with that variable. When the user specifies "-s", we set ECHO to some magic string which changes the output line into a comment, so the output is suppressed. Beside suppressing every output for "-s", we also avoid the redundant short output when compiling with V=1. This changes the output to: ========== $ make -s PLAT=.... bl31 Built build/.../release/bl31.bin ========== $ make PLAT=.... bl31 ... CC lib/libc/strncmp.c CC lib/libc/strnlen.c ... ========== $ make V=1 PLAT=.... bl31 ... gcc -DDEBUG=0 .... -o build/.../release/libc/strncmp.o gcc -DDEBUG=0 .... -o build/.../release/libc/strnlen.o ... ========== Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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- 07 Oct, 2018 2 commits
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Grzegorz Jaszczyk authored
Before switching to new API the scp_bl2 handler was invoked from bl2/bl2_image_load.c which was removed. Invoke the platform specific scp_bl2 handler in analogy to ARM and HiSilicon. Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
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Konstantin Porotchkin authored
Declate Marvell's ownership on tools/doimage Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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- 04 Oct, 2018 2 commits
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Dimitris Papastamos authored
Remove some MISRA defects in common code
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Dimitris Papastamos authored
Remove incorrect tabulation in Makefile
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