- 01 Dec, 2020 1 commit
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Christoph Müllner authored
It uses the system timer as "entropy" source in the same way as QEMU, layerscape and others. Change-Id: Icda17b78e85255bea96109ca2ee0e091187d62ac Signed-off-by: Christoph Müllner <christophm30@gmail.com>
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- 09 Jun, 2020 1 commit
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Philipp Tomsich authored
The RK3368 has two clusters of 4 cores and it's cluster id starts at bit 8 of the MPIDR. To convert from the cluster id (0 or 1) to the lowest CPU-ID in the respective cluster, we thus need to shift by 6 (i.e. shift by 8 to extract the cluster-id and multiply by 4). This change is required to ensure the PSCI support can index the per-cpu entry-address array correctly. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Change-Id: I64a76038f090a85a47067f09f750e96e3946e756
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- 05 Jun, 2020 1 commit
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Heiko Stuebner authored
Current value is 16, count the MAP_REGION calls gets us at least 17, so increase the max value to 20 to have a bit of a margin. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Change-Id: I93d0324f3d483758366e758f8f663545d365e03f
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- 24 Jan, 2020 1 commit
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Deepika Bhavnani authored
PLATFORM_CORE_COUNT - Unsigned int PLATFORM_CLUSTER_COUNT - Unsigned int PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: I624c15d569db477506a74964bc828e1a932181d4
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- 17 Dec, 2019 1 commit
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Heiko Stuebner authored
The agreed upon division of early boot locations is 0x40000 for bl31 to leave enough room for u-boot-spl and 0x100000 for bl33 (u-boot). rk3288 and rk3399 already correctly secure the ddr up to the 1MB boundary so pull the other platforms along to also give the Rockchip TF-A enough room to comfortably live in. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Change-Id: Ie9e0c927d3074a418b6fd23b599d2ed7c15c8c6f
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- 20 Sep, 2019 2 commits
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Kever Yang authored
Rockchip platform is using the first 1MB of DRAM as secure ram space, and there is a vendor loader who loads and runs the BL31/BL32/BL33, this loader is usually load by SoC BootRom to the start addres of DRAM, we need to reserve enough space for this loader so that it doesn't need to do the relocate when loading the BL31. eg. We use U-Boot SPL to load ATF BL31 and U-Boot proper as BL33, the SPL TEXT BASE is offset 0 of DRAM which is decide by Bootrom; if we update the BL31_BASE to offset 0x40000(256KB), then the 0~0x40000 should be enough for SPL and no need to do the relocate while the space size 0x10000(64KB) may not enough for SPL. After this update, the BL31 can use the rest 768KB of the first 1MB, which is also enough, and the loader who is using BL31 elf file can support this update without any change. Change-Id: I66dc685594d77f10f9a49c3be015fd6729250ece Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Kever Yang authored
The 'txet' should be 'text'. Change-Id: I2217a1adf50c3b86f3087b83c77d9291b280627c Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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- 24 Jul, 2019 2 commits
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Julius Werner authored
The Rockchip platform is a prime candidate for switching to the new bl31_params_parse_helper(), so switch it over. This will allow BL2 implementations on this platform to transparently switch over to the version 2 parameter structure. Change-Id: I540741d2425c93f66c8697ce749a351eb2b3a7e8 Signed-off-by: Julius Werner <jwerner@chromium.org>
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Julius Werner authored
This patch changes all Rockchip platforms to use the new common BL aux parameter helpers. Since the parameter space is now cleanly split in generic and vendor-specific parameters and the COREBOOT_TABLE parameter is now generic, the parameter type number for that parameter has to change. Since it only affects coreboot which always builds TF as a submodule and includes its headers directly to get these constants, this should not cause any issues. In general, after this point, we should avoid changing already assigned parameter type numbers whenever possible. Change-Id: Ic99ddd1e91ff5e5fe212fa30c793a0b8394c9dad Signed-off-by: Julius Werner <jwerner@chromium.org>
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- 11 Jul, 2019 1 commit
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Justin Chadwell authored
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit. Change-Id: Ib7fc54e4141cc4f1952a18241bc18671b36e2168 Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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- 28 Jun, 2019 1 commit
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Ambroise Vincent authored
The new API becomes the default one. Change-Id: Ic1d602da3dff4f4ebbcc158b885295c902a24fec Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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- 02 May, 2019 1 commit
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Christoph Müllner authored
All supported Rockchip SoCs (RK3288, RK3328, RK3368 and RK3399) have non-continuous memory areas in the linker script with a huge gap between them. This results in extremely padded binary images with a size of about 4 GiB. E.g. on the RK3399 we have the following memory areas (and base addresses): RAM (0x1000), SRAM (0xFF8C0000), and PMUSRAM (0xFF3B0000). Consumers of the TF-A project (e.g. coreboot or U-Boot) therefore use the ELF image instead, which has a size of a few hundred kBs. In order to prevent the generation of a huge and useless file, this patch disables the binary generation for all affected Rockchip SoCs. Signed-off-by: Christoph Müllner <christophm30@gmail.com> Change-Id: I4ac65bdf1e598c3e1a59507897d183aee9a36916
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- 01 May, 2019 1 commit
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Christoph Müllner authored
In order to set the UART base during bootup in common code of plat/rockchip, we need to streamline the way the UART base addresses are defined and add the missing definitions and mappings. This patch does so by following the pattern UARTn_BASE, which is already in use on RK3399 and RK3328. The numbering itself is derived from the upstream Linux DTS files of the individual SoCs. Signed-off-by: Christoph Müllner <christophm30@gmail.com> Change-Id: I341a1996f4ceed5f82a2f6687d4dead9d7cc5c1f
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- 26 Apr, 2019 1 commit
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Heiko Stuebner authored
While mainline u-boot always expects to submit the devicetree as platform param, coreboot always uses the existing parameter structure. As libfdt is somewhat big, it makes sense to limit its inclusion to where necessary and thus only to non-coreboot builds. libfdt itself will get build in all cases, but only the non- coreboot build will actually reference and thus include it. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Change-Id: I4c5bc28405a14e6070917e48a526bfe77bab2fb7
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- 25 Apr, 2019 1 commit
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Heiko Stuebner authored
The current code doing power-management from sram is highly arm64-specific so should live in a corresponding subdirectory and not in the common area. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Change-Id: I3b79ac26f70fd189d4d930faa6251439a644c5d9
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- 14 Mar, 2019 1 commit
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Heiko Stuebner authored
The Rockchip ATF platform can be entered from both Coreboot and U-Boot. While Coreboot does submit the list of linked parameter structs as platform param, upstream u-boot actually always provides a pointer to a devicetree as parameter. This results in current ATF not running at all when started from U-Boot. To fix this, add a stub that checks if the parameter is a fdt so we can at least boot and not get stuck. Later on we can extend this with actual parsing of information from the devicetree. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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- 28 Jan, 2019 1 commit
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Antonio Nino Diaz authored
After the removal of deprecated interfaces in TF 2.0 the migration to the new GIC driver interfaces was done incorrectly in rk3328 and rk3368: 2d6f1f01 ("rockchip: Migrate to new interfaces"). In the GICv2 driver it is mandated that all interrupts are Group 0 interrupts. This patch simply moves all Group 1 interrupts to Group 0. Change-Id: I224c0135603eb5b81bd512976361500c0d129a91 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 04 Jan, 2019 1 commit
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Antonio Nino Diaz authored
Enforce full include path for includes. Deprecate old paths. The following folders inside include/lib have been left unchanged: - include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH} The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them). For example, this patch had to be created because two headers were called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3 ("drivers: add tzc380 support"). This problem was introduced in commit 4ecca339 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems. Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged. Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 07 Dec, 2018 1 commit
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Julius Werner authored
This patch makes the build system link the console framework code by default, like it already does with other common libraries (e.g. cache helpers). This should not make a difference in practice since TF is linked with --gc-sections, so the linker will garbage collect all functions and data that are not referenced by any other code. Thus, if a platform doesn't want to include console code for size reasons and doesn't make any references to console functions, the code will not be included in the final binary. To avoid compatibility issues with older platform ports, only make this change for the MULTI_CONSOLE_API. Change-Id: I153a9dbe680d57aadb860d1c829759ba701130d3 Signed-off-by: Julius Werner <jwerner@chromium.org>
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- 08 Nov, 2018 1 commit
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Antonio Nino Diaz authored
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards. The style that this project is now to use the full name of the file in capital letters followed by 'H'. For example, for a file called "uart_example.h", the header guard is UART_EXAMPLE_H. The exceptions are files that are imported from other projects: - CryptoCell driver - dt-bindings folders - zlib headers Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 25 Oct, 2018 1 commit
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Antonio Nino Diaz authored
This platform depends on weak functions defined in ``plat/common/aarch64/platform_helpers.S`` that are going to be removed. Change-Id: I5104d091c32271d77ed9690e9dc257c061289def Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 28 Sep, 2018 1 commit
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Antonio Nino Diaz authored
- Migrate to new GIC interfaces. - Migrate to bl31_early_platform_setup2(). - Use bl31_warm_entrypoint() instead of psci_entrypoint(). - Use PLAT_VIRT_ADDR_SPACE_SIZE and PLAT_PHY_ADDR_SPACE_SIZE. - Update Makefile paths. - Remove references to removed build options. - Use private definition of bl31_params_t. Change-Id: I860341594b5c868b2fcaa59d23957ee718472ef1 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 20 Jul, 2018 1 commit
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Antonio Nino Diaz authored
Also change header guards to fix defects of MISRA C-2012 Rule 21.1. Change-Id: Ied0d4b0e557ef6119ab669d106d2ac5d99620c57 Acked-by: Sumit Garg <sumit.garg@linaro.org> Acked-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 27 Apr, 2018 1 commit
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Masahiro Yamada authored
Commit 4c0d0390 ("Rework type usage in Trusted Firmware") changed the type usage in struct declarations, but did not touch the definition side. Fix the type mismatch. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 26 Mar, 2018 1 commit
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Jonathan Wright authored
Ensure (where possible) that switch statements in plat comply with MISRA rules 16.1 - 16.7. Change-Id: Ie4a7d2fd10f6141c0cfb89317ea28a755391622f Signed-off-by: Jonathan Wright <jonathan.wright@arm.com>
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- 27 Feb, 2018 1 commit
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David Cunado authored
MISRA C-2012 Rule 7.3 violation: lowercase l shall not be used as literal suffixes. This patch resolves this for the ULL() macro by using ULL suffix instead of the ull suffix. Change-Id: Ia8183c399e74677e676956e8653e82375d0e0a01 Signed-off-by: David Cunado <david.cunado@arm.com>
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- 29 Jan, 2018 1 commit
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Dimitris Papastamos authored
Change-Id: Ib67b841ab621ca1ace3280e44cf3e1d83052cb73 Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
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- 19 Jan, 2018 2 commits
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Julius Werner authored
This patch changes all Rockchip platforms to use the new MULTI_CONSOLE_API. The platform-specific plat_crash_console implementations are removed so that the platform can use the ones from the common platform code instead. Also change the registers used in plat_crash_print_regs. The existing use of x16 and x17 has always been illegal, since those registers are reserved for use by the linker as a temporary scratch registers in intra-procedure-call veneers and can never be expected to maintain their values across a function call. Change-Id: I8249424150be8d5543ed4af93b56756795a5288f Signed-off-by: Julius Werner <jwerner@chromium.org>
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Julius Werner authored
This patch changes all Rockchip platforms to initialize the serial console with information supplied by coreboot rather than hardcoded base address and divisor values if BL31 is run on top of coreboot. Moving the BL2-to-BL31 parameter parsing as early as possible to ensure that the console is available for all following code. Also update the Rockchip platform to use MULTI_CONSOLE_API. Change-Id: I670d350fa2f8b8133539f91ac14977ab47db60d9 Signed-off-by: Julius Werner <jwerner@chromium.org>
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- 30 Nov, 2017 1 commit
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David Cunado authored
Pre-v8.2 platforms such as the Juno platform does not have the Scalable Vector Extensions implemented and so the build option ENABLE_SVE is set to zero. This has a minor performance improvement with no functional impact. Change-Id: Ib072735db7a0247406f8b60e325b7e28b1e04ad1 Signed-off-by: David Cunado <david.cunado@arm.com>
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- 14 Jul, 2017 1 commit
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Isla Mitchell authored
This fix modifies the order of system includes to meet the ARM TF coding standard. There are some exceptions to this change in order to retain header groupings and where there are headers within #if statements. Change-Id: Ib5b668c992d817cc860e97b29e16ef106d17e404 Signed-off-by: Isla Mitchell <isla.mitchell@arm.com>
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- 08 Jun, 2017 3 commits
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Lin Huang authored
unlike rk3399 and rk3368, there are some rockchip 64bit SOC do not have CPUPD, and pmu_cpuson_entrypoint() is common function for rockchip platform, so we need to check wakeup cpu when resume. Change-Id: I6313e8a9d7c16b03e033414f0cb281646c2159ff Signed-off-by: Lin Huang <hl@rock-chips.com>
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Lin Huang authored
with PMU_PERILP_PD_EN bit enable, the soc will shutdown cm0, crypto, dcf, imem(normal SRAM), dmac, bootrom, efuse_con, spi, i2c, uart, saradc, tsadc when suspend, we have M0 code need to run when suspend in normal SRAM, so we need to take care of that. Change-Id: I8c066637e5b81d4b1d53197450b9d592cbe00793 Signed-off-by: Lin Huang <hl@rock-chips.com> Signed-off-by: Derek Basehore <dbasehore@chromium.org> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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Lin Huang authored
the function pmu_cpuon_entrypoint() need to run in the pmusram, we just copy bin file to pmusram before, now we add pmusram section and link pmu_cpuon_entrypoint() to pmusram directly Change-Id: Iae31e4c01c480c8e6f565a8f588332b478efdb16 Signed-off-by: Lin Huang <hl@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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- 03 May, 2017 1 commit
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dp-arm authored
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file. NOTE: Files that have been imported by FreeBSD have not been modified. [0]: https://spdx.org/ Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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- 20 Mar, 2017 1 commit
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dp-arm authored
These source file definitions should be defined in generic Makefiles so that all platforms can benefit. Ensure that the symbols are properly marked as weak so they can be overridden by platforms. NOTE: This change is a potential compatibility break for non-upstream platforms. Change-Id: I7b892efa9f2d6d216931360dc6c436e1d10cffed Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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- 03 Mar, 2017 1 commit
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tony.xie authored
Change-Id: I6d39b4cac9b34b1f841e9bbddaf9c49785ba0c5e Signed-off-by: tony.xie <tony.xie@rock-chips.com>
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- 23 Jan, 2017 1 commit
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Masahiro Yamada authored
One nasty part of ATF is some of boolean macros are always defined as 1 or 0, and the rest of them are only defined under certain conditions. For the former group, "#if FOO" or "#if !FOO" must be used because "#ifdef FOO" is always true. (Options passed by $(call add_define,) are the cases.) For the latter, "#ifdef FOO" or "#ifndef FOO" should be used because checking the value of an undefined macro is strange. Here, IMAGE_BL* is handled by make_helpers/build_macro.mk like follows: $(eval IMAGE := IMAGE_BL$(call uppercase,$(3))) $(OBJ): $(2) @echo " CC $$<" $$(Q)$$(CC) $$(TF_CFLAGS) $$(CFLAGS) -D$(IMAGE) -c $$< -o $$@ This means, IMAGE_BL* is defined when building the corresponding image, but *undefined* for the other images. So, IMAGE_BL* belongs to the latter group where we should use #ifdef or #ifndef. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 14 Dec, 2016 1 commit
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Antonio Nino Diaz authored
Some files have incorrect copyright notices, this patch fixes all files with deviations from the standard notice. Change-Id: I66b73e78a50a235acb55f1e2ec2052a42c0570d2 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 09 Aug, 2016 1 commit
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Soby Mathew authored
This patch migrates the upstream platform makefiles to include the console drivers from the new location in ARM Trusted Firmware code base. Change-Id: I866d6c4951e475de1f836ce8a8c1d5e6da9577e3
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