- 28 Sep, 2018 15 commits
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Antonio Nino Diaz authored
- Remove references to removed build options. - Remove support for LOAD_IMAGE_V2=0. Change-Id: I296385ef2ebf829446c76a54400d73f963ed265f Tested-by: Nariman Poushin <nariman.poushin@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: I206478597dd9855d3fe1577e7e2c0fe6d2af1cc5 Tested-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
- Migrate to bl31_early_platform_setup2(). - Remove references to removed build options. Change-Id: Ie9f149e3fdec935f9329402ed3dd8e1c00b8832c Acked-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
- Remove references to removed build options. - Update Makefile paths. - Migrate to bl31_early_platform_setup2(). Change-Id: I51cbf09a0297ac1ee645a959063238c9d556d8e1 Tested-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
- Remove references to removed build options. - Remove useless include to removed file. Change-Id: I256da4135ac0a6ff80d4f211689ab4d08436206f Tested-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: Ida5364da1346261cf1636c6a4956a562a5c36ee7 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
- Remove references to removed build options. - Remove support for legacy GIC driver. - Remove support for LOAD_IMAGE_V2=0. Change-Id: I72f8c05620bdf4a682765e6e53e2c04ca749a3d5 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: Icd1cdd42afdc78895a9be6c46b414b0a155cfa63 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: I8ec8b4439ca1d7606aae069c2c576a9a8b18c92c Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
The affected interfaces are bl31_early_platform_setup(), sp_min_early_platform_setup() and bl2_early_platform_setup(). Change-Id: I50c01ec68bcbe97fe4e5d101bcd0f763358b8e1e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: I567a406edb090ae9d109382f6874846a79dd7473 Co-authored-by: Roberto Vargas <roberto.vargas@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Roberto Vargas authored
The code of LOAD_IMAGE_V2=0 has been removed. Change-Id: Iea03e5bebb90c66889bdb23f85c07d0c9717fffe Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: I9fd8016527ad7706494f34356fdae8efacef5f72 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Roberto Vargas authored
Change-Id: I40d040aa05bcbf11536a96ce59827711456b93a8 Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Dimitris Papastamos authored
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- 27 Sep, 2018 1 commit
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Shawn Guo authored
Commit eba1b6b3 ("plat/poplar: migrate to mmc framework") defines variable 'info' without !POPLAR_RECOVERY protection, and hence causes the following unused variable error with POPLAR_RECOVERY=1 build. plat/hisilicon/poplar/bl1_plat_setup.c: In function ‘bl1_platform_setup’: plat/hisilicon/poplar/bl1_plat_setup.c:95:25: error: unused variable ‘info’ [-Werror=unused-variable] struct mmc_device_info info; ^~~~ The patches fixes the build error with POPLAR_RECOVERY=1. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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- 24 Sep, 2018 1 commit
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Elieva Pignat authored
For sgm775 the SCP_BL2 build in debug mode is around 94KiB which is higher than the maximum size for SCP_BL2. This patch increase the maximum allowed size for SCP_BL2 to 96KiB. Change-Id: Ibca0daadba41429301c651ae21cbba87e45ccddf Signed-off-by: Elieva Pignat <Elieva.Pignat@arm.com>
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- 19 Sep, 2018 1 commit
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Andre Przywara authored
At the moment we have two I2C stub drivers (for the Allwinner and the Marvell platform), which #include the actual .c driver file. Change this into the more usual design, by renaming and moving the stub drivers into platform specific header files and including these from the actual driver file. The platform specific include directories make sure the driver picks up the right header automatically. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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- 18 Sep, 2018 1 commit
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Soby Mathew authored
The patch d323af9e removed the support for coherent memory in BL1 and BL2 for ARM platforms. But the CryptoCell SBROM integration depends on use of coherent buffers for passing data from the AP CPU to the CryptoCell. Hence this patch reintroduces support for coherent memory in BL1 and BL2 if ARM_CRYPTOCELL_INTEG=1. Change-Id: I011482dda7f7a3ec9e3e79bfb3f4fa03796f7e02 Signed-Off-by: Soby Mathew <soby.mathew@arm.com>
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- 17 Sep, 2018 2 commits
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Andre Przywara authored
Even though we initialise the platform part and the I2C controller itself at boot time, we actually only access the bus on power down. Meanwhile a rich OS might have configured the I2C pins differently or even disabled the controller. So repeat the platform setup and controller initialisation just before we actually access the bus to power off the system. This is safe, because at this point the rich OS should no longer be running. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Andre Przywara authored
Drop the unnecessary check for the I2C pins being already configured as I2C pins (we actually don't care). Also avoid resetting *every* peripheral that is covered by the PRCM reset controller, instead just clear the one line connected to the I2C controller. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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- 10 Sep, 2018 1 commit
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Soby Mathew authored
This patch fixes an array overrun in CSS scmi driver if the system power domain level is less than 2. This was reported from https://scan.coverity.com/projects/arm-software-arm-trusted-firmware CID 308492 Change-Id: I3a59c700490816718d20c71141281f19b2b7e7f7 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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- 09 Sep, 2018 1 commit
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Teddy Reed authored
This patch adds experimental support for TBB to the HiKey960 board. To build and test with TBB modify the uefi-tools project platforms.config +ATF_BUILDFLAGS=TRUSTED_BOARD_BOOT=1 GENERATE_COT=1 SAVE_KEYS=1 \ MBEDTLS_DIR=./mbedtls Signed-off-by: Teddy Reed <teddy@casualhacking.io>
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- 07 Sep, 2018 8 commits
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Icenowy Zheng authored
The AXP805 PMIC used with H6 is capable of shutting down the system. Add support for using it to shut down the system power. The original placeholder power off code is moved to A64 code, as it's still TODO to implement PMIC operations for A64. Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
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Icenowy Zheng authored
The OTT reference design of Allwinner H6 SoC uses an X-Powers AXP805 PMIC. Add initial code for it. Currently it's only detected. Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
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Icenowy Zheng authored
As the ATF may need to do some power initialization on Allwinner platform with AXP PMICs, call the PMIC setup code in BL31. Stub of PMIC setup code is added, to prevent undefined reference. Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
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Sathees Balya authored
The patch 7b56928a unified the FWU mechanism on FVP and Juno platforms due to issues with MCC firmware not preserving the NVFLAGS. With MCCv150 firmware, this issue is resolved. Also writing to the NOR flash while executing from the same flash in Bypass mode had some stability issues. Hence, since the MCC firmware issue is resolved, this patch reverts to the NVFLAGS mechanism to detect FWU. Also, with the introduction of SDS (Shared Data Structure) by the SCP, the reset syndrome needs to queried from the appropriate SDS field. Change-Id: If9c08f1afaaa4fcf197f3186887068103855f554 Signed-off-by: Sathees Balya <sathees.balya@arm.com> Signed-off-by: Soby Mathew <Soby.Mathew@arm.com>
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Alexei Fedorov authored
Adds an undocumented build option that enables non-secure access to the PL011 UART1. This allows a custom build where the UART can be used as a serial debug port for WinDbg (or other debugger) connection. This option is not documented in the user guide, as it is provided as a convenience for Windows debugging, and not intended for general use. In particular, enabling non-secure access to the UART might allow a denial of service attack! Change-Id: I4cd7d59c2cac897cc654ab5e1188ff031114ed3c Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
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John Tsichritzis authored
A cache flush is added in BL1, in Mbed TLS shared heap code. Thus, we ensure that the heap info written to the DTB always gets written back to memory. Hence, sharing this info with other images is guaranteed. Change-Id: I0faada31fe7a83854cd5e2cf277ba519e3f050d5 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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John Tsichritzis authored
In Mbed TLS shared heap code, an additional sanity check is introduced in BL2. Currently, when BL2 shares heap with BL1, it expects the heap info to be found in the DTB. If for any reason the DTB is missing, BL2 cannot have the heap address and, hence, Mbed TLS cannot proceed. So, BL2 cannot continue executing and it will eventually crash. With this change we ensure that if the DTB is missing BL2 will panic() instead of having an unpredictable crash. Change-Id: I3045ae43e54b7fe53f23e7c2d4d00e3477b6a446 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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John Tsichritzis authored
This patch, firstly, makes the error messages consistent to how printed strings are usually formatted. Secondly, it removes an unnecessary #if directive. Change-Id: Idbb8ef0070562634766b683ac65f8160c9d109e6 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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- 05 Sep, 2018 1 commit
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Icenowy Zheng authored
The Marvell A8K SoCs use the MI2CV IP core from Mentor Graphics, which is also used by Allwinner. As Mentor Graphics allows a lot of customization, the MI2CV in the two SoC families are not compatible, and driver modifications are needed. Extract the common code to a MI2CV driver. Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
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- 04 Sep, 2018 8 commits
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Jens Wiklander authored
Replaces deprecated early platform setup APIs * Replaces bl31_early_platform_setup() with bl31_early_platform_setup2() * Replaces bl2_early_platform_setup() with bl2_early_platform_setup2() Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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Bryan O'Donoghue authored
Previous changes in this series made the necessary driver additions and updates. With those changes in-place we can add the platform.mk and bl2_el3_setup.c to drive the boot process. After this commit its possible to build a fully-functional TF-A for the WaRP7 and boot from the BootROM to the Linux command prompt in secure or non-secure mode. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
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Bryan O'Donoghue authored
This patch adds a callback into the BootROM's provided High Assurance Boot (HAB) failsafe function when panicking i.e. the call is done without making use of stack. The HAB failsafe function allows a piece of software to call into the BootROM and place the processor into failsafe mode. Failsafe mode is a special mode which presents a serial download protocol interface over UART or USB at the time of writing. If the board has been set into secure mode, then only a signed binary can be used to recover the board. Thus failsafe gives a putatively secure method of performing a secure recovery over UART or USB. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
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Bryan O'Donoghue authored
This patch adds entries to the mem params array for - BL32 - BL32_EXTRA1 - BL32_EXTRA2 - BL33 - HW_CONFIG_ID BL32 is marked as bootable to indicate that OPTEE is the thing that should be booted next. In our model OPTEE chain-loads onto u-boot so only BL32 is bootable. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
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Bryan O'Donoghue authored
This commit adds support for parsing a FIP pre-loaded by a previous boot-phase such as u-boot or via ATF reading directly from eMMC. [bod: squashing several patches from Rui, Jun and bod] Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
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Bryan O'Donoghue authored
This patch defines a platform_def.h describing - FIP layout and location - eMMC device select - UART identity select - System clock frequency - Operational memory map Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
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Bryan O'Donoghue authored
In order to link even a basic image we need to declare REGISTER_BL_IMAGE_DESCS. This patch declares an empty structure which is passed to REGISTER_BL_IMAGE_DESCS(). Later patches will add in some meaningful data. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
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Bryan O'Donoghue authored
Internal declarations for the WaRP7 port will go here. For now just include sys/types.h. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
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