1. 20 Feb, 2014 3 commits
    • Achin Gupta's avatar
      Factor out translation table setup in ARM FVP port · a0cd989d
      Achin Gupta authored
      This patch factors out the ARM FVP specific code to create MMU
      translation tables so that it is possible for a boot loader stage to
      create a different set of tables instead of using the default ones.
      The default translation tables are created with the assumption that
      the calling boot loader stage executes out of secure SRAM. This might
      not be true for the BL3_2 stage in the future.
      
      A boot loader stage can define the `fill_xlation_tables()` function as
      per its requirements. It returns a reference to the level 1
      translation table which is used by the common platform code to setup
      the TTBR_EL3.
      
      This patch is a temporary solution before a larger rework of
      translation table creation logic is introduced.
      
      Change-Id: I09a075d5da16822ee32a411a9dbe284718fb4ff6
      a0cd989d
    • Achin Gupta's avatar
      Add support for BL3-2 in BL2 · a3050ed5
      Achin Gupta authored
      
      
      This patch adds support for loading a BL3-2 image in BL2. In case a
      BL3-2 image is found, it also passes information to BL3-1 about where it
      is located and the extents of memory available to it. Information about
      memory extents is populated by platform specific code.
      
      The documentation has also been updated to reflect the above changes.
      
      Change-Id: I526b2efb80babebab1318f2b02e319a86d6758b0
      Co-authored-by: default avatarJeenu Viswambharan <jeenu.viswambharan@arm.com>
      a3050ed5
    • Achin Gupta's avatar
      Rework BL2 to BL3-1 hand over interface · e4d084ea
      Achin Gupta authored
      This patch reworks BL2 to BL3-1 hand over interface by introducing a
      composite structure (bl31_args) that holds the superset of information
      that needs to be passed from BL2 to BL3-1.
      
        - The extents of secure memory available to BL3-1
        - The extents of memory available to BL3-2 (not yet implemented) and
          BL3-3
        - Information to execute BL3-2 (not yet implemented) and BL3-3 images
      
      This patch also introduces a new platform API (bl2_get_bl31_args_ptr)
      that needs to be implemented by the platform code to export reference to
      bl31_args structure which has been allocated in platform-defined memory.
      
      The platform will initialize the extents of memory available to BL3-3
      during early platform setup in bl31_args structure. This obviates the
      need for bl2_get_ns_mem_layout platform API.
      
      BL2 calls the bl2_get_bl31_args_ptr function to get a reference to
      bl31_args structure. It uses the 'bl33_meminfo' field of this structure
      to load the BL3-3 image. It sets the entry point information for the
      BL3-3 image in the 'bl33_image_info' field of this structure. The
      reference to this structure is passed to the BL3-1 image.
      
      Also fixes issue ARM-software/tf-issues#25
      
      Change-Id: Ic36426196dd5ebf89e60ff42643bed01b3500517
      e4d084ea
  2. 17 Feb, 2014 3 commits
    • Achin Gupta's avatar
      Setup VBAR_EL3 incrementally · b739f22a
      Achin Gupta authored
      This patch ensures that VBAR_EL3 points to the simple stack-less
      'early_exceptions' when the C runtime stack is not correctly setup to
      use the more complex 'runtime_exceptions'. It is initialised to
      'runtime_exceptions' once this is done.
      
      This patch also moves all exception vectors into a '.vectors' section
      and modifies linker scripts to place all such sections together. This
      will minimize space wastage from alignment restrictions.
      
      Change-Id: I8c3e596ea3412c8bd582af9e8d622bb1cb2e049d
      b739f22a
    • Jeenu Viswambharan's avatar
      Move translation tables into separate section · 74cbb839
      Jeenu Viswambharan authored
      This patch moves the translation tables into their own section. This
      saves space that would otherwise have been lost in padding due to page
      table alignment constraints. The BL31 and BL32 bases have been
      consequently adjusted.
      
      Change-Id: Ibd65ae8a5ce4c4ea9a71a794c95bbff40dc63e65
      74cbb839
    • Harry Liebel's avatar
      Add Firmware Image Package (FIP) driver · 561cd33e
      Harry Liebel authored
      The Firmware Image Package (FIP) driver allows for data to be loaded
      from a FIP on platform storage. The FVP supports loading bootloader
      images from a FIP located in NOR FLASH.
      
      The implemented FVP policy states that bootloader images will be
      loaded from a FIP in NOR FLASH if available and fall back to loading
      individual images from semi-hosting.
      
      NOTE:
      - BL3-3(e.g. UEFI) is loaded into DRAM and needs to be configured
        to run from the BL33_BASE address. This is currently set to
        DRAM_BASE+128MB for the FVP.
      
      Change-Id: I2e4821748e3376b5f9e467cf3ec09509e43579a0
      561cd33e
  3. 20 Jan, 2014 3 commits
  4. 17 Jan, 2014 2 commits
    • Jeenu Viswambharan's avatar
      Change comments in assembler files to help ctags · 3a4cae05
      Jeenu Viswambharan authored
      Ctags seem to have a problem with generating tags for assembler symbols
      when a comment immediately follows an assembly label.
      
      This patch inserts a single space character between the label
      definition and the following comments to help ctags.
      
      The patch is generated by the command:
      
        git ls-files -- \*.S | xargs sed -i 's/^\([^:]\+\):;/\1: ;/1'
      
      Change-Id: If7a3c9d0f51207ea033cc8b8e1b34acaa0926475
      3a4cae05
    • Dan Handley's avatar
      Update year in copyright text to 2014 · e83b0cad
      Dan Handley authored
      Change-Id: Ic7fb61aabae1d515b9e6baf3dd003807ff42da60
      e83b0cad
  5. 20 Dec, 2013 1 commit
    • Harry Liebel's avatar
      Create local C library implementation (1/2) · c81b1d0f
      Harry Liebel authored
      - This change is split into two separate patches in order to
        simplify the history as interpreted by 'git'. The split is
        between the move/rename and addition of new files.
      - Remove dependency on toolchain C library headers and functions in
        order to ensure behavioural compatibility between toolchains.
      - Use FreeBSD as reference for C library implementation.
      - Do not let GCC use default library include paths.
      - Remove unused definitions in modified headers and implementations.
      - Move C library files to 'lib/stdlib' and 'include/stdlib'.
      - Break std.c functions out into separate files.
      
      Change-Id: I91cddfb3229775f770ad781589670c57d347a154
      c81b1d0f
  6. 12 Dec, 2013 2 commits
    • Sandrine Bailleux's avatar
      BL2: Sanity check value in x0 in the entry point code · 34edaed5
      Sandrine Bailleux authored
      Change-Id: Icef68e314e6ba0f3694189b57f4b1dbbea5ba255
      34edaed5
    • Sandrine Bailleux's avatar
      Remove useless copies of meminfo structures · ee12f6f7
      Sandrine Bailleux authored
      Platform setup code has to reserve some memory for storing the
      memory layout information.  It is populated in early platform setup
      code.
      
      blx_get_sec_mem_layout() functions used to return a copy of this
      structure.  This patch modifies blx_get_sec_mem_layout() functions
      so that they now directly return a pointer to their memory layout
      structure.  It ensures that the memory layout returned by
      blx_get_sec_mem_layout() is always up-to-date and also avoids a
      useless copy of the meminfo structure.
      
      Also rename blx_get_sec_mem_layout() to blx_plat_sec_mem_layout()
      to make it clear those functions are platform specific.
      
      Change-Id: Ic7a6f9d6b6236b14865ab48a9f5eff545ce56551
      ee12f6f7
  7. 05 Dec, 2013 3 commits
    • Dan Handley's avatar
      Enable third party contributions · ab2d31ed
      Dan Handley authored
      - Add instructions for contributing to ARM Trusted Firmware.
      
      - Update copyright text in all files to acknowledge contributors.
      
      Change-Id: I9311aac81b00c6c167d2f8c889aea403b84450e5
      ab2d31ed
    • Sandrine Bailleux's avatar
      Properly initialise the C runtime environment · 65f546a1
      Sandrine Bailleux authored
      This patch makes sure the C runtime environment is properly
      initialised before executing any C code.
      
        - Zero-initialise NOBITS sections (e.g. the bss section).
        - Relocate BL1 data from ROM to RAM.
      
      Change-Id: I0da81b417b2f0d1f7ef667cc5131b1e47e22571f
      65f546a1
    • Sandrine Bailleux's avatar
      Various improvements/cleanups on the linker scripts · 8d69a03f
      Sandrine Bailleux authored
        - Check at link-time that bootloader images will fit in memory
          at run time and that they won't overlap each other.
        - Remove text and rodata orphan sections.
        - Define new linker symbols to remove the need for platform setup
          code to know the order of sections.
        - Reduce the size of the raw binary images by cutting some sections
          out of the disk image and allocating them at load time, whenever
          possible.
        - Rework alignment constraints on sections.
        - Remove unused linker symbols.
        - Homogenize linker symbols names across all BLs.
        - Add some comments in the linker scripts.
      
      Change-Id: I47a328af0ccc7c8ab47fcc0dc6e7dd26160610b9
      8d69a03f
  8. 27 Nov, 2013 1 commit
  9. 25 Oct, 2013 1 commit