- 24 Jul, 2019 1 commit
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Julius Werner authored
This patch changes all Rockchip platforms to use the new common BL aux parameter helpers. Since the parameter space is now cleanly split in generic and vendor-specific parameters and the COREBOOT_TABLE parameter is now generic, the parameter type number for that parameter has to change. Since it only affects coreboot which always builds TF as a submodule and includes its headers directly to get these constants, this should not cause any issues. In general, after this point, we should avoid changing already assigned parameter type numbers whenever possible. Change-Id: Ic99ddd1e91ff5e5fe212fa30c793a0b8394c9dad Signed-off-by: Julius Werner <jwerner@chromium.org>
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- 12 Jul, 2019 5 commits
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Madhukar Pappireddy authored
Fix the header file path Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com> Change-Id: I73a92a3f0049ecbda7eade452405927c04048e01
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Toshiyuki Ogasahara authored
Update the revision number in the revision management file. Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I94acd1bb53d9d2453e550e2a13b6391b9088ff8d
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Justin Chadwell authored
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit. Change-Id: I67984b6c48c08af61e95a4dbd18047e2c3151f9a Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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Justin Chadwell authored
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit. Change-Id: Ia0a10b4a30e63c0cbf1d0f8dfe5768e0a93ae1c7 Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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Justin Chadwell authored
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit. Change-Id: If5a88e1b880bcb2be2278398cf5109a6d877e632 Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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- 11 Jul, 2019 5 commits
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Justin Chadwell authored
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit. Change-Id: Ib63ef6e2e4616dd56828bfd3800d5fe2df109934 Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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Justin Chadwell authored
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit. Change-Id: I4c7a315cb18b3bbe623e7a7a998d2dac869638a7 Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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Justin Chadwell authored
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit. Change-Id: Ib7fc54e4141cc4f1952a18241bc18671b36e2168 Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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Justin Chadwell authored
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit. Change-Id: I51278beacbe6da79853c3f0f0f94cd806fc9652c Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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Justin Chadwell authored
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit. Change-Id: I78f386f5ac171d6e52383a3e42003e6fb3e96b57 Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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- 10 Jul, 2019 2 commits
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Balint Dobszay authored
Change-Id: I755e4c42242d9a052570fd1132ca3d937acadb13 Signed-off-by: Balint Dobszay <balint.dobszay@arm.com>
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Tien Hock, Loh authored
MMC sample select needs to be set properly so that DWMMC clock can be driven to 50Mhz Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com> Change-Id: I4a1dde4f6a1e78a36940c57a7a5b162be0bd443a
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- 08 Jul, 2019 1 commit
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Madhukar Pappireddy authored
Include necessary header file to use ARRAY_SIZE() macro Change-Id: I5b7caccd02c14c598b7944cf4f347606c1e7a8e7 Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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- 05 Jul, 2019 1 commit
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Masahiro Yamada authored
The legacy console is gone. Re-add the console support based on the multi-console framework. I am still keeping the putc, getc, and flush callbacks in uniphier_console.S to use plat/common/aarch64/crash_console_helpers.S The console registration code already relies on that C environment has been set up. So, I just filled the struct console fields with the callback pointers, then called console_register() directly. I also re-implemented the init function in C to improve the readability. Removing the custom crash console implementation has one disadvantage; we cannot use the crash console on very early crashes because crash_console_helpers.S works only after the console is registered. I can live with this limitation. Tested on my boards, and confirmed this worked like before. Change-Id: Ieab9c849853ff6c525c15ea894a85944f257db59 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 04 Jul, 2019 2 commits
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Andrew F. Davis authored
These errors are asynchronous and cannot be directly correlated with the exact current running software, so handling them in the same EL is not critical. Handling them in TF-A allows for more platform specific decoding of the implementation defined exception registers Signed-off-by: Andrew F. Davis <afd@ti.com> Change-Id: Iee7a38c9fc9c698fa0ad42dafa598bcbed6a4fda
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Jacky Bai authored
CAAM module must be initialized in secure world before it can be used in non-secure world. Change-Id: I042893667ddef99d8b6fc3902847d516d8591996 Signed-off-by: Jacky Bai <ping.bai@nxp.com>
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- 01 Jul, 2019 2 commits
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Soby Mathew authored
Signed-off-by: Soby Mathew <soby.mathew@arm.com> Change-Id: I2281b3c1b8a0f2caa751c746b7835f998183e0af
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Ambroise Vincent authored
This patch addds multi console interface for ZynqMP platform Change-Id: I508a61412df2b71d04bca6a1139c8f32cbd7dccd Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com> Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
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- 28 Jun, 2019 3 commits
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Ambroise Vincent authored
Change-Id: Iab788e3e7cb2f83144255c4eb830712fd5cb6240 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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Ambroise Vincent authored
Change-Id: I87818b220568cc34838726b32ddf29ee6cf31ed7 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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Ambroise Vincent authored
The new API becomes the default one. Change-Id: Ic1d602da3dff4f4ebbcc158b885295c902a24fec Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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- 26 Jun, 2019 5 commits
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Manoj Kumar authored
N1SDP platform supports RDIMMs with ECC capability. To use the ECC capability, the entire DDR memory space has to be zeroed out before enabling the ECC bits in DMC620. Zeroing out several gigabytes of memory from SCP is quite time consuming so functions are added that zeros out the DDR memory from application processor which is much faster compared to SCP. BL33 binary cannot be copied to DDR memory before enabling ECC so this is also done by TF-A from IOFPGA-DDR3 memory to main DDR4 memory after ECC is enabled. Original PLAT_PHY_ADDR_SPACE_SIZE was limited to 36-bits with which the entire DDR space cannot be accessed as DRAM2 starts in base 0x8080000000. So these macros are redefined for all ARM platforms. Change-Id: If09524fb65b421b7a368b1b9fc52c49f2ddb7846 Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
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Hadi Asyrafi authored
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: I0544315986ee28b23157fdfec3fe5aebae6b860f
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Hadi Asyrafi authored
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: I0ffccca7ea83bff35c9f149d7054cd610a59ec01
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Hadi Asyrafi authored
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: I5241ed97697b0280b590b47b9173d102d23f305a
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Hadi Asyrafi authored
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: Ib79e2c6fe6e66dec5004701133ad6a5f4c78f2fa
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- 22 Jun, 2019 1 commit
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Marek Vasut authored
Now that PFC drivers are cleaned up , move them out of staging. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Ie594b53558c2bfb8e5d88e5b0354752c17a2487e
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- 20 Jun, 2019 2 commits
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Andreas Färber authored
initilise -> initialise Signed-off-by: Andreas Färber <afaerber@suse.de> Change-Id: Ib129e6bd48623b6565b669bc674208893a2f7668
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Andreas Färber authored
Let bl31_check_ns_address() print the address it doesn't like. Signed-off-by: Andreas Färber <afaerber@suse.de> Change-Id: I29a4fb33c24e9f7464ccd2ea44a4608f5cfe5be6
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- 17 Jun, 2019 8 commits
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Marek Vasut authored
Now that QoS drivers are cleaned up , move them out of staging. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: If61ab2157c30b8f5a6b91d2c56ddbb9098ef99e8
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Yann Gautier authored
Change-Id: Idee966b6434aa038e54b6e7176749a7b65bdbe84 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
Do not export function dt_get_stdout_node_offset() that is used only inside stm32mp_dt.c source file. Change-Id: I9dd3dbfab21d42ed81c68723e71fe5a7586dce93 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
Correct SDMMC macros to define unsigned values as expected by the driver implementation. Change-Id: Ib009f3df2cf26a9759d129eb571a27b2564770ce Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
Remove inclusion of libfdt source files in source file list since these are already included from generic libfdt.mk makefile. Change-Id: If42624557c4d88ca85d70f83b1b08c58f50afe72 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
The system configuration controller is mainly used to manage the compensation cell and other IOs and system related settings. The SYSCFG driver is in charge of configuring masters on the interconnect, IO compensation, low voltage boards, or pull-ups for boot pins. All other configurations should be handled in Linux drivers requiring it. Device tree files are also updated to manage vdd-supply regulator. Change-Id: I10fb513761a7d1f2b7afedca9c723ad9d1bccf42 Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
GPIOx clocks are specific to each STM32MP platforms. This change moves function stm32_get_gpio_bank_clock() from stm32mp common source files to platform private stm32mp1_private.c source file. Change-Id: I9616c0d3fe4d10af715d6f2d1550c13ab62c829a Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
Those functions are generic for parsing nodes from device tree hence could be located in generic source file. The oscillators description structure is also moved to STM32MP1 clock driver, as it is no more used in stm32mp1_clkfunc and cannot be in a generic file. Change-Id: I93ba74f4eea916440fef9b160d306af1b39f17c6 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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- 13 Jun, 2019 1 commit
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Marek Vasut authored
Convert the R-Car Gen3 platform and both SCIF and Log drivers to multi-console API. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I18556973937d150b60453f9150d54ee612571e35
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- 11 Jun, 2019 1 commit
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Louis Mayencourt authored
BL2U should not build when RESET_TO_SP_MIN flag is set, like BL1 and BL2. Change-Id: Iac516121f98611ca1f58d2b5efdec6525b06ce4e Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
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