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  1. 31 Aug, 2020 5 commits
  3. 28 Aug, 2020 15 commits
  5. 27 Aug, 2020 1 commit
  7. 26 Aug, 2020 1 commit
  9. 25 Aug, 2020 5 commits
    • Julius Werner's avatar
      qti: Add SPMI PMIC arbitrator driver · f40008a4
      Julius Werner authored 
      

This patch adds a very rudimentary driver for the SPMI arbitrator used
to access the PMIC. It doesn't support all the controller's actual
arbitration features, so it should probably not be used concurrently
with a running kernel (and it's also not optimized for performance). But
it can be used to set a few registers during boot or on shutdown to
control reset handling, which is all we need it for.

Change-Id: I8631c34a2a89ac71aa1ec9b8266e818c922fe34a
Signed-off-by: default avatarJulius Werner <jwerner@chromium.org>
      f40008a4
    • Julius Werner's avatar
      qti/sc7180: Fix GIC-600 support setting · 2acf0043
      Julius Werner authored 
      

The patch adding platform support for sc7180 landed around roughly the
same time as the patch that changed GICV3_IMPL to GICV3_SUPPORT_GIC600.
Thus the sc7180 Makefile is still using the old variable name which now
no longer does anything, and it hangs on boot due to the lacking GIC-600
support. This patch fixes the issue.
Signed-off-by: default avatarJulius Werner <jwerner@chromium.org>
Change-Id: Id76ada1445c3c5ac9a5a3697b4e749088b89d796
      2acf0043
    • Varun Wadekar's avatar
      Tegra194: introduce support for `SPD=spmd` · 670306d3
      Varun Wadekar authored 
      

This patch introduces the following changes to enable
compilation for `SPD=spmd` command line option.

* compile plat_spmd_manifest.c
* compile libfdt source files

Verified with the `SPD=spmd` command line option for
Tegra194 platforms.
Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
Change-Id: I7f57aa4f1756b19f78d87415bb80794417174bc8
      670306d3
    • Varun Wadekar's avatar
      Tegra: introduce backend support to compile libfdt · eb7e5087
      Varun Wadekar authored 
      

This patch includes the following files from libc to
compile libfdt:

* memchr.c
* memcmp.c
* strrchr.c

The BUILD_PLAT macro is evaluated earlier to allow libfdt
installation to the right directory.
Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
Change-Id: Ie43fcf701dc051670e6372e21b3a84a6416c1735
      eb7e5087
    • Varun Wadekar's avatar
      Tegra: disable signed comparison · 8d51439e
      Varun Wadekar authored 
      

libfdt does not support the -Wsign-compare compiler option
and the right patch will eventually be pushed upstream.

This patch disables the -Wsign-compare compiler option
to allow libfdt compilation for Tegra platforms until
the actual issue is fixed.
Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
Change-Id: Ib7a93946cad1ea9ec1b46751edb79a74c08ed0ac
      8d51439e
  11. 24 Aug, 2020 9 commits
    • Varun Wadekar's avatar
      plat: common: include "bl_common.h" from plat_spmd_manifest.c · cb7b9db1
      Varun Wadekar authored 
      

This patch includes the bl_common.h from plat_spmd_manifest.c to
fix the following compilation errors

<snip>
plat/common/plat_spmd_manifest.c: In function 'plat_spm_core_manifest_load':
plat/common/plat_spmd_manifest.c:130:18: error: implicit declaration of function 'page_align' [-Werror=implicit-function-declaration]
  130 |  pm_base_align = page_align(pm_base, UP);
      |                  ^~~~~~~~~~
plat/common/plat_spmd_manifest.c:130:38: error: 'UP' undeclared (first use in this function); did you mean 'UL'?
  130 |  pm_base_align = page_align(pm_base, UP);
      |                                      ^~
      |                                      UL
plat/common/plat_spmd_manifest.c:130:38: note: each undeclared identifier is reported only once for each function it appears in
plat/common/plat_spmd_manifest.c:146:38: error: 'DOWN' undeclared (first use in this function)
  146 |  pm_base_align = page_align(pm_base, DOWN);
      |                                      ^~~~
cc1: all warnings being treated as errors
<snip>
Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
Change-Id: Ib8edb36c6a80a23df2462e708c513c966aab1fef
      cb7b9db1
    • Varun Wadekar's avatar
      Tegra194: remove AON_WDT IRQ mapping · be41aac7
      Varun Wadekar authored 
      

This patch removes the unused interrupt mapping for AON_WDT
for all Tegra194 platforms.
Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
Change-Id: I475a1e83f809c740e62464b5b4e93cb0a2e33d6b
      be41aac7
    • Varun Wadekar's avatar
      Tegra: smmu: add smmu_verify function · 21ec61a9
      Varun Wadekar authored 
      

The SMMU configuration can get corrupted or updated by
external clients during boot without our knowledge.

This patch introduces a "verify" function for the SMMU
driver, to check that the boot configuration settings are
intact.  Usually, this function should be called at the
end of the boot cycle.

This function only calls panic() on silicon platforms.

Change-Id: I2ab45a7f228781e71c73ba1f4ffc49353effe146
Signed-off-by: default avatarGeorge Bauernschmidt <georgeb@nvidia.com>
      21ec61a9
    • Varun Wadekar's avatar
      Tegra: TZDRAM setup from soc specific early_boot handlers · 13fed5a7
      Varun Wadekar authored 
      

TZDRAM setup is not required for all Tegra SoCs. The previous bootloader
can enable the TZDRAM fence due to architectural improvements in the
newer chips.

This patch moves the TZDRAM setup to early_boot handlers for SoCs to
handle this scenario.

Change-Id: I6481b4f848a4dadc20cb83852cd8e19a242b3a34
Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      13fed5a7
    • Varun Wadekar's avatar
      Tegra: remove "platform_get_core_pos" function · f41dc86c
      Varun Wadekar authored 
      

This patch removes the deprecated 'plat_core_pos_by_mpidr' function
from the Tegra platform port.

Change-Id: I32e06cb7269e4fbfaf9ad6c26d0722201f982f9e
Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      f41dc86c
    • Varun Wadekar's avatar
      Tegra: print GICC registers conditionally · 7cd336ab
      Varun Wadekar authored 
      

The GICC interface exists only on the interrupt controllers following
the GICv2 specification.

This patch prints the GICC register contents from the platform's macro,
plat_crash_print_regs' only when TEGRA_GICC_BASE is defined. This
allows platforms using future versions of the GIC specification to
still use this macro.

Change-Id: Ia5762d0a1ae28c832664d69362a7776e46a22ad1
Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      7cd336ab
    • Varun Wadekar's avatar
      Tegra: spe: do not flush console in console_putc · 64b2a237
      Varun Wadekar authored 
      

SPE no longer requires the flush bit to be set to start transmitting
characters over the physical uart. Therefore, the flush bit is no
longer required when calling console_core_putc. However, flushing the
console still requires the flush bit.

This patch removes the flush bit from the mailbox messages in
console_core_putc to improve ACK latency.

Original change by: Mustafa Bilgen <mbilgen@nvidia.com>

Change-Id: I5b7d1f3ea69ea2ce308566dbaae222b04e4c373d
Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      64b2a237
    • kalyanic's avatar
      Tegra: verify platform compatibility · fbcd053c
      kalyanic authored 
      

This patch verifies that the binary image is compatible with
chip ID of the platform.

Change-Id: I28db221b4442aa8827a092faadf32f110d7c5cb4
Signed-off-by: default avatarkalyanic <kalyanic@nvidia.com>
      fbcd053c
    • Sayanta Pattanayak's avatar
      n1sdp: remote chip SPI numbering for multichip GIC routing · 0df3eb70
      Sayanta Pattanayak authored 
      

Allocated 512-959 SPI numbers for remote n1sdp chip and same has been
referenced for GIC routing table.

Change-Id: Id79ea493fd665ed93fe9644a59e363ec10441098
Signed-off-by: default avatarSayanta Pattanayak <sayanta.pattanayak@arm.com>
      0df3eb70
  13. 21 Aug, 2020 1 commit
  15. 20 Aug, 2020 2 commits
  17. 19 Aug, 2020 1 commit
    • Alexei Fedorov's avatar
      libc/memset: Implement function in assembler · e7d344de
      Alexei Fedorov authored 
      

Trace analysis of FVP_Base_AEMv8A model running in
Aarch32 mode with the build options listed below:
TRUSTED_BOARD_BOOT=1 GENERATE_COT=1
ARM_ROTPK_LOCATION=devel_ecdsa KEY_ALG=ecdsa
ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_ecdsa.pem
shows that when auth_signature() gets called
71.84% of CPU execution time is spent in memset() function
written in C using single byte write operations,
see lib\libc\memset.c.
This patch replaces C memset() implementation with assembler
version giving the following results:
- for Aarch32 in auth_signature() call memset() CPU time
reduced to 24.84%.
- Number of CPU instructions executed during TF-A
boot stage before start of BL33 in RELEASE builds:
----------------------------------------------
|  Arch   |     C      |  assembler |    %   |
----------------------------------------------
| Aarch32 | 2073275460 | 1487400003 | -28.25 |
| Aarch64 | 2056807158 | 1244898303 | -39.47 |
----------------------------------------------
The patch also replaces memset.c with aarch64/memset.S
in plat\nvidia\tegra\platform.mk.

Change-Id: Ifbf085a2f577a25491e2d28446ee95a4ac891597
Signed-off-by: default avatarAlexei Fedorov <Alexei.Fedorov@arm.com>
      e7d344de