- 04 Sep, 2018 4 commits
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Rajan Vaja authored
Correct function header of pm_api_clock_getparent() and pm_api_clock_setparent(). Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Acked-by: Will Wong <WILLW@xilinx.com>
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Siva Durga Prasad Paladugu authored
PLL type clock is enabled by FSBL on boot-up. PMUFW enable/disable them based on their user count. So, it should not be handled from ATF. Put PLL type clock into bypass and reset mode only while changing PLL rate (FBDIV). Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Acked-by: Will Wong <WILLW@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
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Siva Durga Prasad Paladugu authored
CCF has already provision to enable clock during registration through CLK_IS_CRITICAL flag. Use CLK_IS_CRITICAL instead of init_enable attribute. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Acked-by: Jolly Shah <jolly.shah@xilinx.com>
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Siva Durga Prasad Paladugu authored
WDT used by APU is FPD_WDT. FPD WDT clock is controlled by FPD_SLCR.WDT_CLK_SEL register. Correct the same in WDT clock database. As per FPD_SLCR.WDT_CLK_SEL register, there can be only two parents of WDT clock not three. Fix the same by correcting it's parents in clock database. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Acked-by: Jolly Shah <jolly.shah@xilinx.com>
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- 27 Aug, 2018 1 commit
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Rajan Vaja authored
Currently in Linux maximum number of clocks is hard-coded and so it needs to allocate static memory. It can get actual clock number after querying all clock names by special clock name string. Add new query data parameter to get actual number of clocks so Linux can get actual clock numbers in advance. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
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- 15 Mar, 2018 3 commits
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Jolly Shah authored
Various changes to comply with MISRA static analysis rules Signed-off-by: Jolly Shah <jollys@xilinx.com>
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Rajan Vaja authored
- Add clock entries and information to clock database. - Implement APIs to provide clock topology and other information to caller. - Implement APIs to control clocks and PLLs. Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
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Rajan Vaja authored
These are empty functions with no logic right now. Code will be added in subsequent commits. Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
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