- 10 Aug, 2018 2 commits
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Haojian Zhuang authored
Migrate from emmc framework to mmc framework. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
Migrate to mmc framework. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 27 Jul, 2018 1 commit
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Kaihua Zhong authored
GPIO_089 connects to PCIE_PERST_N. It needs to be configured as output low. Signed-off-by: Kaihua Zhong <zhongkaihua@huawei.com> Signed-off-by: Xiaowei Song <songxiaowei@hisilicon.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 22 Jul, 2018 1 commit
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Haojian Zhuang authored
BL1 is used in recovery mode on HiKey. The TBB implementation on HiKey is in BL2. It means that user need to build ATF BL2 with TBB and ATF BL1 with non-TBB. It's inconvenient. So include TBB in BL1, too. Signed-off-by: Teddy Reed <teddy@prosauce.org> Signed-off-by: Victor Chong <victor.chong@linaro.org> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 20 Jul, 2018 1 commit
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Antonio Nino Diaz authored
Also change header guards to fix defects of MISRA C-2012 Rule 21.1. Change-Id: Ied0d4b0e557ef6119ab669d106d2ac5d99620c57 Acked-by: Sumit Garg <sumit.garg@linaro.org> Acked-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 06 Jul, 2018 1 commit
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Teddy Reed authored
This patch adds experimental support for TRUSTED_BOARD_BOOT to the Hikey. This is adapted from the RPi3 and QEMU implementations. Since the Hikey starts from BL2 the TRUSTED_BOARD_BOOT ROT begins there too. When TRUSTED_BOARD_BOOT is defined, the BL1 build is skipped. See the following example: make \ PLAT=hikey \ BL33=u-boot.bin \ SCP_BL2=mcuimage.bin \ TRUSTED_BOARD_BOOT=1 \ MBEDTLS_DIR=../../mbedtls \ GENERATE_COT=1 \ all fip Signed-off-by: Teddy Reed <teddy.reed@gmail.com>
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- 14 Jun, 2018 1 commit
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Roberto Vargas authored
RFC4122 defines that fields are stored in network order (big endian), but TF-A stores them in machine order (little endian by default in TF-A). We cannot change the future UUIDs that are already generated, but we can store all the bytes using arrays and modify fiptool to generate the UUIDs with the correct byte order. Change-Id: I97be2d3168d91f4dee7ccfafc533ea55ff33e46f Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 27 Apr, 2018 1 commit
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Masahiro Yamada authored
Since commit 031dbb12 ("AArch32: Add essential Arch helpers"), it is difficult to use consistent format strings for printf() family between aarch32 and aarch64. For example, uint64_t is defined as 'unsigned long long' for aarch32 and as 'unsigned long' for aarch64. Likewise, uintptr_t is defined as 'unsigned int' for aarch32, and as 'unsigned long' for aarch64. A problem typically arises when you use printf() in common code. One solution could be, to cast the arguments to a type long enough for both architectures. For example, if 'val' is uint64_t type, like this: printf("val = %llx\n", (unsigned long long)val); Or, somebody may suggest to use a macro provided by <inttypes.h>, like this: printf("val = %" PRIx64 "\n", val); But, both would make the code ugly. The solution adopted in Linux kernel is to use the same typedefs for all architectures. The fixed integer types in the kernel-space have been unified into int-ll64, like follows: typedef signed char int8_t; typedef unsigned char uint8_t; typedef signed short int16_t; typedef unsigned short uint16_t; typedef signed int int32_t; typedef unsigned int uint32_t; typedef signed long long int64_t; typedef unsigned long long uint64_t; [ Linux commit: 0c79a8e29b5fcbcbfd611daf9d500cfad8370fcf ] This gets along with the codebase shared between 32 bit and 64 bit, with the data model called ILP32, LP64, respectively. The width for primitive types is defined as follows: ILP32 LP64 int 32 32 long 32 64 long long 64 64 pointer 32 64 'long long' is 64 bit for both, so it is used for defining uint64_t. 'long' has the same width as pointer, so for uintptr_t. We still need an ifdef conditional for (s)size_t. All 64 bit architectures use "unsigned long" size_t, and most 32 bit architectures use "unsigned int" size_t. H8/300, S/390 are known as exceptions; they use "unsigned long" size_t despite their architecture is 32 bit. One idea for simplification might be to define size_t as 'unsigned long' across architectures, then forbid the use of "%z" string format. However, this would cause a distortion between size_t and sizeof() operator. We have unknowledge about the native type of sizeof(), so we need a guess of it anyway. I want the following formula to always return 1: __builtin_types_compatible_p(size_t, typeof(sizeof(int))) Fortunately, ARM is probably a majority case. As far as I know, all 32 bit ARM compilers use "unsigned int" size_t. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 24 Apr, 2018 1 commit
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Victor Chong authored
Fixes: f3d522be ("poplar: Support Trusted OS extra image (OP-TEE header) parsing") Signed-off-by: Victor Chong <victor.chong@linaro.org>
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- 11 Apr, 2018 3 commits
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Haojian Zhuang authored
Clean cache to flush parameters into SRAM before MCU using them. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
Store those DDR parameters into SRAM. They may be used by MCU firmware. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
Fix that DDR can't work at 533MHz. Now step to set DDR frequency from 150MHz to 800MHz. DDR could work among these frequency, 150MHz, 266MHz, 400MHz, 533MHz and 800MHz. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 28 Mar, 2018 1 commit
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Haojian Zhuang authored
If system is still accessing storage device, reboot operation may cause data broken. So add the flush and delay operation before system reset. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 27 Mar, 2018 1 commit
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Joel Hutton authored
Void pointers have been used to access linker symbols, by declaring an extern pointer, then taking the address of it. This limits symbols values to aligned pointer values. To remove this restriction an IMPORT_SYM macro has been introduced, which declares it as a char pointer and casts it to the required type. Change-Id: I89877fc3b13ed311817bb8ba79d4872b89bfd3b0 Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>
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- 26 Mar, 2018 1 commit
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Jonathan Wright authored
Ensure (where possible) that switch statements in plat comply with MISRA rules 16.1 - 16.7. Change-Id: Ie4a7d2fd10f6141c0cfb89317ea28a755391622f Signed-off-by: Jonathan Wright <jonathan.wright@arm.com>
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- 12 Mar, 2018 1 commit
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Michael Brandl authored
Boot memory layout is specific for a platform, but should not be mixed up with other platform specific attributes. A separate file is much cleaner and better to compare with other platforms. Take a look at plat/poplar where it is done the same way. Moved hikey_def.h to system include folder and moved includes from hikey_def.h to more general platform_def.h. Signed-off-by: Michael Brandl <git@fineon.pw>
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- 06 Mar, 2018 2 commits
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Haojian Zhuang authored
plat/hisilicon/hikey/hikey_bl1_setup.c:565:47: error: value size does not match register size specified by the constraint and modifier [-Werror,-Wasm-operand-widths] __asm__ volatile ("mrs %0, cpacr_el1" : "=r"(data)); Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
plat/hisilicon/hikey960/drivers/pwrc/hisi_pwrc.c:290:20: error: unused function 'hisi_pdc_set_intmask' [-Werror,-Wunused-function] static inline void hisi_pdc_set_intmask(void *pdc_base_addr, ^ 1 error generated. Makefile:605: recipe for target 'build/hikey960/release/bl31/hisi_pwrc.o' failed make: *** [build/hikey960/release/bl31/hisi_pwrc.o] Error 1 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 05 Mar, 2018 10 commits
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Haojian Zhuang authored
Create hikey960_bl_common.c to store duplication initialization code in both BL1 and BL2. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
It's unnecessary to call platform driver initialization in image load driver. We could make bl2_platform_setup() to executing just before SCP_BL2 by setting flag IMAGE_ATTRIB_PLAT_SETUP. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
Since non-TF ROM is used in HiKey960 platform (Hisilicon Hi3660 SoC), replace BL1 by BL2_EL3 in normal boot mode. When flush images in recovery mode, keep to use BL1. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
Since LOAD_IMAGE_V2 is always enabled in HiKey960 platform. Drop LOAD_IMAGE v1 to simplify code. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
MAP_TSP_MEM could be either in SRAM or DRAM. When MAP_TSP_MEM is in DRAM, it's overlapped with MAP_DDR. Since TSP_MEM is always configured in DRAM case, it means MAP_OPTEE_PAGEABLE is always disabled. Just remove it. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
The main difference between HiKey960 v1 hardware and HiKey960 v2 hardware is on UART console. But the function of detecting boardid dumps message before console ready. So fix it by removing those messages. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
Create hikey_bl_common.c to store duplicated initialization code in BL1 and BL2. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
Since non-TF ROM is used in HiKey platform (Hisilicon Hi6220 SoC), replace BL1 by BL2_EL3 in normal boot mode. When we recovery images in recovery mode, keep to use BL1. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
Although SRAM is initialized, DCACHE should be cleaned too. Because MCU is a parrallel core to access SRAM. We need to make sure that initialized value is really written to SRAM before MCU using it. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
Since LOAD_IMAGE_V2 is always enabled in HiKey platform. Drop LOAD_IMAGE v1 to simplify code. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 27 Feb, 2018 1 commit
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David Cunado authored
MISRA C-2012 Rule 7.3 violation: lowercase l shall not be used as literal suffixes. This patch resolves this for the ULL() macro by using ULL suffix instead of the ull suffix. Change-Id: Ia8183c399e74677e676956e8653e82375d0e0a01 Signed-off-by: David Cunado <david.cunado@arm.com>
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- 17 Feb, 2018 1 commit
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Haojian Zhuang authored
Avoid hardcode on uart port. The uart port could be auto detected on HiKey960 platform. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 07 Feb, 2018 6 commits
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Victor Chong authored
Signed-off-by: Victor Chong <victor.chong@linaro.org>
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Victor Chong authored
Signed-off-by: Victor Chong <victor.chong@linaro.org> Tested-by: Shawn Guo <shawn.guo@linaro.org>
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Victor Chong authored
Signed-off-by: Victor Chong <victor.chong@linaro.org> Tested-by: Shawn Guo <shawn.guo@linaro.org>
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Victor Chong authored
Signed-off-by: Victor Chong <victor.chong@linaro.org> Tested-by: Shawn Guo <shawn.guo@linaro.org>
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Victor Chong authored
Signed-off-by: Victor Chong <victor.chong@linaro.org> Tested-by: Shawn Guo <shawn.guo@linaro.org>
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Victor Chong authored
Signed-off-by: Victor Chong <victor.chong@linaro.org> Tested-by: Shawn Guo <shawn.guo@linaro.org>
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- 01 Feb, 2018 2 commits
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Masahiro Yamada authored
In the next commit, I need the image name in lowercase because output files are generally named in lowercase. Unfortunately, TOOL_ADD_IMG takes the first argument in uppercase since we generally use uppercase Make variables. make_helpers/build_macros.mk provides 'uppercase' macro to convert a string into uppercase, but 'lowercase' does not exist. We can implement it if we like, but it would be more straightforward to change the argument of TOOL_ADD_IMG. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Now FIP_ADD_IMG takes care of both fiptool and cert_create symmetrically. Rename it so that it matches the behavior. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 30 Jan, 2018 1 commit
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Haojian Zhuang authored
MAP_TSP_MEM could be either in SRAM or DRAM. When MAP_TSP_MEM is in DRAM, it's overlapped with MAP_DDR. Since MAP_OPTEE_PAGEABLE isn't used in SRAM case, just remove it. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 29 Jan, 2018 1 commit
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Dimitris Papastamos authored
Change-Id: Ib67b841ab621ca1ace3280e44cf3e1d83052cb73 Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
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