- 22 Mar, 2020 1 commit
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Varun Wadekar authored
This patch renames 'ENABLE_WDT_LEGACY_FIQ_HANDLING' macro to 'ENABLE_TEGRA_WDT_LEGACY_FIQ_HANDLING', to indicate that this is a Tegra feature. Change-Id: I5c4431e662223ee80efbfd5ec2513f8b1cadfc50 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 19 Mar, 2020 1 commit
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Varun Wadekar authored
This patch increases the assert logging level for all Tegra platforms to VERBOSE, to print the actual assertion condition to the console, improving debuggability. Change-Id: If3399bde63fa4261522cab984cc9c49cd2073358 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 20 Feb, 2020 2 commits
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Varun Wadekar authored
This patch provides platforms an opportunity to relocate the BL32 image, during cold boot. Tegra186 platforms, for example, relocate BL32 images to TZDRAM memory as the previous bootloader relies on BL31 to do so. Change-Id: Ibb864901e43aca5bf55d8c79e918b598c12e8a28 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Varun Wadekar authored
This patch adds the macro to enable legacy FIQ handling to the common Tegra makefile. The default value of this macro is '0'. Platforms that need this support should enable it from their makefiles. This patch also helps fix violation of Rule 20.9. Rule 20.9 "All identifiers used in the controlling expression of #if of #elif preprocessing directives shall be #define'd before evaluation" Change-Id: I4f0c9917c044b5b1967fb5e79542cd3bf6e91f18 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 01 Mar, 2019 1 commit
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Varun Wadekar authored
This patch provides dummy macros and platform files to compile the io_storage driver backend. This patch is necessary to remove the "--unresolved=el3_panic" linker flag from Tegra's makefiles and allow us to revert this workaround, previously suggested by the ARM toolchain team. The "--unresolved=el3_panic" flag actually was a big hammer that allowed Tegra platforms to work with armlink previously but it masks legit errors with the code as well. Change-Id: I0421d35657823215229f84231896b84167f90548 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 27 Feb, 2019 1 commit
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Varun Wadekar authored
This patch provides support for using the scatterfile format as the linker script with the 'armlink' linker for Tegra platforms. In order to enable the scatterfile usage the following changes have been made: * provide mapping for ld.S symbols in bl_common.h * include bl_common.h from all the affected files * update the makefile rules to use the scatterfile and armlink to compile BL31 * update pubsub.h to add sections to the scatterfile NOTE: THIS CHANGE HAS BEEN VERIFIED WITH TEGRA PLATFORMS ONLY. Change-Id: I7bb78b991c97d74a842e5635c74cb0b18e0fce67 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 05 Feb, 2019 1 commit
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Anthony Zhou authored
This patch redefines the variable LIBC_SRCS for Tegra platforms, to remove unused libc files from the list. This patch is a building block to eventually use other libc implementations in the future. Change-Id: Iccde5a75f5e2d6f4e2dbc6274beb423b80e846fd Signed-off-by: Anthony Zhou <anzhou@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 23 Jan, 2019 1 commit
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Varun Wadekar authored
This patch enables the '-nostdlib' flag to instruct the compiler to not use the standard system libraries and startup files. Change-Id: Ibf34856f7579ed686280cee19c35d08448cf921c Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 18 Jan, 2019 2 commits
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Varun Wadekar authored
This patch enables the 'WARMBOOT_ENABLE_DCACHE_EARLY' flag to enable D-cache early, during the CPU warmboot sequence. This flag is applicable for platforms like Tegra, which do not require interconnect programming to enable cache coherency. Change-Id: Id39471cf0922799960d8f1de6e5e0d605a53f7ca Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Varun Wadekar authored
This patch enables prints from asserts() for release/debug builds on all Tegra platforms. Change-Id: Ie256437a325a7c5015a10f55aba2287a91b57bca Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 28 Sep, 2018 1 commit
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Antonio Nino Diaz authored
- Migrate to bl31_early_platform_setup2(). - Remove references to removed build options. - Replace zeromem16() by zeromem(). - Use private definition of bl31_params_t. This is an incomplete migration, the platform doesn't currently compile. Change-Id: I67fbf2206678be80c3a16692024221a131cec42f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 30 Nov, 2017 1 commit
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David Cunado authored
Pre-v8.2 platforms such as the Juno platform does not have the Scalable Vector Extensions implemented and so the build option ENABLE_SVE is set to zero. This has a minor performance improvement with no functional impact. Change-Id: Ib072735db7a0247406f8b60e325b7e28b1e04ad1 Signed-off-by: David Cunado <david.cunado@arm.com>
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- 23 Jun, 2017 1 commit
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Douglas Raillard authored
Use TF_CFLAGS instead of CFLAGS, to allow CFLAGS to be overriden from the make command line. Change-Id: I3e5726c04bcd0176f232581b8be2c94413374ac7 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
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- 14 Jun, 2017 1 commit
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Varun Wadekar authored
This patch enables the 'sign-compare' flag, to enable warning/errors for comparisons between signed/unsigned variables. The warning has been enabled for all the Tegra platforms, to start with. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 03 May, 2017 1 commit
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dp-arm authored
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file. NOTE: Files that have been imported by FreeBSD have not been modified. [0]: https://spdx.org/ Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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- 26 Apr, 2017 2 commits
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Varun Wadekar authored
This patch changes the platform Makefile to set `ENABLE_ASSERTIONS` to 1 instead of the deprecated option `ASM_ASSERTION`. This also pulls in C assertions in release mode. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Varun Wadekar authored
This patch groups all the platform configuration macros into the common platform.mk makefile. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 07 Mar, 2017 1 commit
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Varun Wadekar authored
This patch enables the following erratas for the Tegra210 SoC: * Cortex-A57 ============= - A57_DISABLE_NON_TEMPORAL_HINT - ERRATA_A57_826974 - ERRATA_A57_826977 - ERRATA_A57_828024 - ERRATA_A57_829520 - ERRATA_A57_833471 * Cortex-A53 ============= - A53_DISABLE_NON_TEMPORAL_HINT - ERRATA_A53_826319 - ERRATA_A53_836870 Tegra210 uses Cortex-A57 revision: r1p1 and Cortex-A53 revision: r0p2. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 27 Feb, 2017 1 commit
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Varun Wadekar authored
This change disables the cache non-temporal hints for A57 and A53 CPUs on Tegra. Change-Id: I279d95aec5afbc3ca3cc4b34aa16de3f2c83a4fc Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 23 Feb, 2017 1 commit
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Varun Wadekar authored
This patch enables the PSCI_EXTENDED_STATE_ID macro. Tegra platforms have moved on to using the extended state ID for CPU_SUSPEND, where the NS world passes the state ID and wakeup time as part of the state ID field. Change-Id: Ie8b0fec285d8b2330bc26ff239a4f628425c9fcf Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 04 Dec, 2015 1 commit
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Varun Wadekar authored
This patch modifies the Tegra port to support the new platform APIs so that we can disable the compat layer. This includes modifications to the power management and platform topology code. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 24 Jul, 2015 1 commit
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Varun Wadekar authored
This patch modifies the 'BUILD_PLAT' makefile variable to point to the soc specific build directory in order to allow each Tegra soc to have its own build directory. This way we can keep the build outputs separate and can keep multiple soc specific builds alive at the same time. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 29 May, 2015 1 commit
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Varun Wadekar authored
T210 is the latest chip in the Tegra family of SoCs from NVIDIA. It is an ARM v8 dual-cluster (A57/A53) SoC, with any one of the clusters being active at a given point in time. This patch adds support to boot the Trusted Firmware on T210 SoCs. The patch also adds support to boot secondary CPUs, enter/exit core power states for all CPUs in the slow/fast clusters. The support to switch between clusters is still not available in this patch and would be available later. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 28 Apr, 2015 1 commit
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Dan Handley authored
This major change pulls out the common functionality from the FVP and Juno platform ports into the following categories: * (include/)plat/common. Common platform porting functionality that typically may be used by all platforms. * (include/)plat/arm/common. Common platform porting functionality that may be used by all ARM standard platforms. This includes all ARM development platforms like FVP and Juno but may also include non-ARM-owned platforms. * (include/)plat/arm/board/common. Common platform porting functionality for ARM development platforms at the board (off SoC) level. * (include/)plat/arm/css/common. Common platform porting functionality at the ARM Compute SubSystem (CSS) level. Juno is an example of a CSS-based platform. * (include/)plat/arm/soc/common. Common platform porting functionality at the ARM SoC level, which is not already defined at the ARM CSS level. No guarantees are made about the backward compatibility of functionality provided in (include/)plat/arm. Also remove any unnecessary variation between the ARM development platform ports, including: * Unify the way BL2 passes `bl31_params_t` to BL3-1. Use the Juno implementation, which copies the information from BL2 memory instead of expecting it to persist in shared memory. * Unify the TZC configuration. There is no need to add a region for SCP in Juno; it's enough to simply not allow any access to this reserved region. Also set region 0 to provide no access by default instead of assuming this is the case. * Unify the number of memory map regions required for ARM development platforms, although the actual ranges mapped for each platform may be different. For the FVP port, this reduces the mapped peripheral address space. These latter changes will only be observed when the platform ports are migrated to use the new common platform code in subsequent patches. Change-Id: Id9c269dd3dc6e74533d0e5116fdd826d53946dc8
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- 31 Mar, 2015 1 commit
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Varun Wadekar authored
TLK Dispatcher (tlkd) is based on the tspd and is the glue required to run TLK as a Secure Payload with the Trusted Firmware. Change-Id: I69e573d26d52342eb049feef773dd7d2a506f4ab Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 20 Aug, 2014 1 commit
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Soby Mathew authored
This patch introduces a framework which will allow CPUs to perform implementation defined actions after a CPU reset, during a CPU or cluster power down, and when a crash occurs. CPU specific reset handlers have been implemented in this patch. Other handlers will be implemented in subsequent patches. Also moved cpu_helpers.S to the new directory lib/cpus/aarch64/. Change-Id: I1ca1bade4d101d11a898fb30fea2669f9b37b956
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- 06 May, 2014 2 commits
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Dan Handley authored
Remove all usage of the vpath keyword in makefiles as it was prone to mistakes. Specify the relative paths to source files instead. Also reorder source files in makefiles alphabetically. Fixes ARM-software/tf-issues#121 Change-Id: Id15f60655444bae60e0e2165259efac71a50928b
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Dan Handley authored
Move almost all system include files to a logical sub-directory under ./include. The only remaining system include directories not under ./include are specific to the platform. Move the corresponding source files to match the include directory structure. Also remove pm.h as it is no longer used. Change-Id: Ie5ea6368ec5fad459f3e8a802ad129135527f0b3
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- 26 Mar, 2014 1 commit
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Sandrine Bailleux authored
bl1/aarch64/early_exceptions.S used to be re-used by BL2, BL3-1 and BL3-2. There was some early SMC handling code in there that was not required by the other bootloader stages. Therefore this patch introduces an even simpler exception vector source file for BL2, BL3-1 and BL3-2. Fixes ARM-software/tf-issues#38 Change-Id: I0244b80e9930b0f8035156a0bf91cc3e9a8f995d
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- 20 Mar, 2014 1 commit
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Jeenu Viswambharan authored
At present, the entry point for each BL image is specified via the Makefiles and provided on the command line to the linker. When using a link script the entry point should rather be specified via the ENTRY() directive in the link script. This patch updates linker scripts of all BL images to specify the entry point using the ENTRY() directive. It also removes the --entry flag passed to the linker through Makefile. Fixes issue ARM-software/tf-issues#66 Change-Id: I1369493ebbacea31885b51185441f6b628cf8da0
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- 05 Mar, 2014 1 commit
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Jon Medhurst authored
This change requires all platforms to now specify a list of source files rather than object files. New source files should preferably be specified by using the path as well and we should add this in the future for all files so we can remove use of vpath. This is desirable because vpath hides issues like the fact that BL2 currently pulls in a BL1 file bl1/aarch64/early_exceptions.S and if in the future we added bl2/aarch64/early_exceptions.S then it's likely only one of the two version would be used for both bootloaders. This change also removes the 'dump' build target and simply gets bootloaders to always generate a dump file. At the same time the -x option is added so the section headers and symbols table are listed. Fixes ARM-software/tf-issues#11 Change-Id: Ie38f7be76fed95756c8576cf3f3ea3b7015a18dc Signed-off-by: Jon Medhurst <tixy@linaro.org>
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- 20 Feb, 2014 1 commit
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Achin Gupta authored
This patch factors out the ARM FVP specific code to create MMU translation tables so that it is possible for a boot loader stage to create a different set of tables instead of using the default ones. The default translation tables are created with the assumption that the calling boot loader stage executes out of secure SRAM. This might not be true for the BL3_2 stage in the future. A boot loader stage can define the `fill_xlation_tables()` function as per its requirements. It returns a reference to the level 1 translation table which is used by the common platform code to setup the TTBR_EL3. This patch is a temporary solution before a larger rework of translation table creation logic is introduced. Change-Id: I09a075d5da16822ee32a411a9dbe284718fb4ff6
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- 20 Jan, 2014 2 commits
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Ryan Harkin authored
Tidy up the spacing of variable definitions within the makefiles to make them more consistent, easier to read and amend. Change-Id: Ic6d7c8489ca4330824abb5cd1ead8f1d449d1a85 Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
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Ryan Harkin authored
Move all explicit platform or architecture specific references into a new platform.mk file that is defined for each platform. Change-Id: I9d6320d1ba957e0cc8d9b316b3578132331fa428 Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
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- 17 Jan, 2014 1 commit
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Dan Handley authored
Change-Id: Ic7fb61aabae1d515b9e6baf3dd003807ff42da60
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- 20 Dec, 2013 1 commit
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Harry Liebel authored
- This change is split into two separate patches in order to simplify the history as interpreted by 'git'. The split is between the move/rename and addition of new files. - Remove dependency on toolchain C library headers and functions in order to ensure behavioural compatibility between toolchains. - Use FreeBSD as reference for C library implementation. - Do not let GCC use default library include paths. - Remove unused definitions in modified headers and implementations. - Move C library files to 'lib/stdlib' and 'include/stdlib'. - Break std.c functions out into separate files. Change-Id: I91cddfb3229775f770ad781589670c57d347a154
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- 05 Dec, 2013 1 commit
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Dan Handley authored
- Add instructions for contributing to ARM Trusted Firmware. - Update copyright text in all files to acknowledge contributors. Change-Id: I9311aac81b00c6c167d2f8c889aea403b84450e5
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- 25 Oct, 2013 1 commit
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Achin Gupta authored
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