1. 02 Nov, 2015 2 commits
    • Sandrine Bailleux's avatar
      Improve display_boot_progress() function · ee5c2b13
      Sandrine Bailleux authored
       - Remove out-dated information about the use of printf() in the
         function comment.
      
       - Make the argument const, as the function doesn't need to modify it.
      
       - Rename the function into bl1_print_bl31_ep_info() to make its
         purpose clearer.
      
      Change-Id: I2a9d215a37f0ec11aefce0c5c9e050473b7a6b25
      ee5c2b13
    • Sandrine Bailleux's avatar
      Introduce print_entry_point_info() function · 68a68c92
      Sandrine Bailleux authored
      This patch introduces a new function called 'print_entry_point_info'
      that prints an entry_point_t structure for debugging purposes.
      As such, it can be used to display the entry point address, SPSR and
      arguments passed from a firmware image to the next one.
      
      This function is now called in the following images transitions:
       - BL1 to BL2
       - BL1 to BL31
       - BL31 to the next image (typically BL32 or BL33)
      
      The following changes have been introduced:
      
       - Fix the output format of the SPSR value : SPSR is a 32-bit value,
         not a 64-bit one.
      
       - Print all arguments values.
         The entry_point_info_t structure allows to pass up to 8 arguments.
         In most cases, only the first 2 arguments were printed.
         print_entry_point_info() now prints all of them as 'VERBOSE'
         traces.
      
      Change-Id: Ieb384bffaa7849e6cb95a01a47c0b7fc2308653a
      68a68c92
  2. 28 Oct, 2015 3 commits
    • danh-arm's avatar
      Merge pull request #415 from jcastillo-arm/jc/plat_err_handler · f57e2db6
      danh-arm authored
      Add optional platform error handler API
      f57e2db6
    • danh-arm's avatar
      Merge pull request #416 from davwan01/dw/css-common · ece32c4f
      danh-arm authored
      Allow CSS to redefine function `plat_arm_calc_core_pos`
      ece32c4f
    • Juan Castillo's avatar
      Add optional platform error handler API · 40fc6cd1
      Juan Castillo authored
      This patch adds an optional API to the platform port:
      
          void plat_error_handler(int err) __dead2;
      
      The platform error handler is called when there is a specific error
      condition after which Trusted Firmware cannot continue. While panic()
      simply prints the crash report (if enabled) and spins, the platform
      error handler can be used to hand control over to the platform port
      so it can perform specific bookeeping or post-error actions (for
      example, reset the system). This function must not return.
      
      The parameter indicates the type of error using standard codes from
      errno.h. Possible errors reported by the generic code are:
      
          -EAUTH  : a certificate or image could not be authenticated
                    (when Trusted Board Boot is enabled)
          -ENOENT : the requested image or certificate could not be found
                    or an IO error was detected
          -ENOMEM : resources exhausted. Trusted Firmware does not use
                    dynamic memory, so this error is usually an indication
                    of an incorrect array size
      
      A default weak implementation of this function has been provided.
      It simply implements an infinite loop.
      
      Change-Id: Iffaf9eee82d037da6caa43b3aed51df555e597a3
      40fc6cd1
  3. 27 Oct, 2015 4 commits
    • danh-arm's avatar
      Merge pull request #417 from jcastillo-arm/jc/makefile_2 · 368bb87b
      danh-arm authored
      Makefile rework and bug fix #2
      368bb87b
    • Juan Castillo's avatar
      Make: fix dependency files generation · 88154678
      Juan Castillo authored
      Currently, if no make goal is specified in the command line, 'all'
      is assumed by default, but the dependency files are not generated.
      This might lead to a successful but inconsistent build. This patch
      provides a fix to the problem.
      
      Change-Id: I0148719e114dbdbe46f8a57c7d05da7cbc212c92
      88154678
    • Juan Castillo's avatar
      Rework Makefile · 73c99d4e
      Juan Castillo authored
      This patch is a complete rework of the main Makefile. Functionality
      remains the same but the code has been reorganized in sections in
      order to improve readability and facilitate adding future extensions.
      
      A new file 'build_macros.mk' has been created and will contain common
      definitions (variables, macros, etc) that may be used from the main
      Makefile and other platform specific makefiles.
      
      A new macro 'FIP_ADD_IMG' has been introduced and it will allow the
      platform to specify binary images and the necessary checks for a
      successful build. Platforms that require a BL30 image no longer need
      to specify the NEED_BL30 option. The main Makefile is now completely
      unaware of additional images not built as part of Trusted Firmware,
      like BL30. It is the platform responsibility to specify images using
      the macro 'FIP_ADD_IMG'. Juno uses this macro to include the BL30
      image in the build.
      
      BL33 image is specified in the main Makefile to preserve backward
      compatibility with the NEED_BL33 option. Otherwise, platform ports
      that rely on the definition of NEED_BL33 might break.
      
      All Trusted Board Boot related definitions have been moved to a
      separate file 'tbbr_tools.mk'. The main Makefile will include this
      file unless the platform indicates otherwise by setting the variable
      'INCLUDE_TBBR_MK := 0' in the corresponding platform.mk file. This
      will keep backward compatibility but ideally each platform should
      include the corresponding TBB .mk file in platform.mk.
      
      Change-Id: I35e7bc9930d38132412e950e20aa2a01e2b26801
      73c99d4e
    • David Wang's avatar
      Allow CSS to redefine function `plat_arm_calc_core_pos` · 371d4399
      David Wang authored
      Currently all ARM CSS platforms which include css_helpers.S use the same
      strong definition of `plat_arm_calc_core_pos`. This patch allows these CSS
      platforms to define their own strong definition of this function.
      
      * Replace the strong definition of `plat_arm_calc_core_pos` in
        css_helpers.S with a utility function `css_calc_core_pos_swap_cluster`
        does the same thing (swaps cluster IDs). ARM CSS platforms may choose
        to use this function or not.
      
      * Add a Juno strong definition of `plat_arm_calc_core_pos`, which uses
        `css_calc_core_pos_swap_cluster`.
      
      Change-Id: Ib5385ed10e44adf6cd1398a93c25973eb3506d9d
      371d4399
  4. 26 Oct, 2015 2 commits
  5. 23 Oct, 2015 4 commits
    • Juan Castillo's avatar
      Use standard errno definitions in load_auth_image() · 78460a05
      Juan Castillo authored
      This patch replaces custom definitions used as return values for
      the load_auth_image() function with standard error codes defined
      in errno.h. The custom definitions have been removed.
      
      It also replaces the usage of IO framework error custom definitions,
      which have been deprecated. Standard errno definitions are used
      instead.
      
      Change-Id: I1228477346d3876151c05b470d9669c37fd231be
      78460a05
    • Juan Castillo's avatar
      IO Framework: use standard errno codes as return values · 7e26fe1f
      Juan Castillo authored
      This patch redefines the values of IO_FAIL, IO_NOT_SUPPORTED and
      IO_RESOURCES_EXHAUSTED to match the corresponding definitions in
      errno.h:
      
          #define IO_FAIL                     (-ENOENT)
          #define IO_NOT_SUPPORTED            (-ENODEV)
          #define IO_RESOURCES_EXHAUSTED      (-ENOMEM)
      
      NOTE: please note that the IO_FAIL, IO_NOT_SUPPORTED and
      IO_RESOURCES_EXHAUSTED definitions are considered deprecated
      and their usage should be avoided. Callers should rely on errno.h
      definitions when checking the return values of IO functions.
      
      Change-Id: Ic8491aa43384b6ee44951ebfc053a3ded16a80be
      7e26fe1f
    • Juan Castillo's avatar
      cert_create: specify command line options in the CoT · ad2c1a9a
      Juan Castillo authored
      This patch introduces a new API that allows to specify command
      line options in the Chain of Trust description. These command line
      options may be used to specify parameters related to the CoT (i.e.
      keys or certificates), instead of keeping a hardcoded list of
      options in main.c.
      
      Change-Id: I282b0b01cb9add557b26bddc238a28253ce05e44
      ad2c1a9a
    • Juan Castillo's avatar
      cert_create: improve command line argument check · dfc90e26
      Juan Castillo authored
      The certificate generation tool currently checks if all command
      line options required to create all certificates in the CoT have
      been specified. This prevents using the tool to create individual
      certificates when the whole CoT is not required.
      
      This patch improves the checking function so only those options
      required by the certificates specified in the command line are
      verified.
      
      Change-Id: I2c426a8e2e2dec85b15f2d98fd4ba949c1aed385
      dfc90e26
  6. 21 Oct, 2015 2 commits
  7. 20 Oct, 2015 3 commits
    • danh-arm's avatar
      Merge pull request #409 from sandrine-bailleux/sb/break-down-bl1-sync-exceptions · 4425448a
      danh-arm authored
      Break down BL1 AArch64 synchronous exception handler
      4425448a
    • Juan Castillo's avatar
      Add optional bl1_plat_prepare_exit() API · e3f67124
      Juan Castillo authored
      This patch adds an optional API to the platform port:
      
          void bl1_plat_prepare_exit(void);
      
      This function is called prior to exiting BL1 in response to the
      RUN_IMAGE_SMC request raised by BL2. It should be used to perform
      platform specific clean up or bookkeeping operations before
      transferring control to the next image.
      
      A weak empty definition of this function has been provided to
      preserve platform backwards compatibility.
      
      Change-Id: Iec09697de5c449ae84601403795cdb6aca166ba1
      e3f67124
    • Soby Mathew's avatar
      Reorganise PSCI PM handler setup on ARM Standard platforms · 785fb92b
      Soby Mathew authored
      This patch does the following reorganization to psci power management (PM)
      handler setup for ARM standard platform ports :
      
      1. The mailbox programming required during `plat_setup_psci_ops()` is identical
         for all ARM platforms. Hence the implementation of this API is now moved
         to the common `arm_pm.c` file. Each ARM platform now must define the
         PLAT_ARM_TRUSTED_MAILBOX_BASE macro, which in current platforms is the same
         as ARM_SHARED_RAM_BASE.
      
      2. The PSCI PM handler callback structure, `plat_psci_ops`, must now be
         exported via `plat_arm_psci_pm_ops`. This allows the common implementation
         of `plat_setup_psci_ops()` to return a platform specific `plat_psci_ops`.
         In the case of CSS platforms, a default weak implementation of the same is
         provided in `css_pm.c` which can be overridden by each CSS platform.
      
      3. For CSS platforms, the PSCI PM handlers defined in `css_pm.c` are now
         made library functions and a new header file `css_pm.h` is added to export
         these generic PM handlers. This allows the platform to reuse the
         adequate CSS PM handlers and redefine others which need to be customized
         when overriding the default `plat_arm_psci_pm_ops` in `css_pm.c`.
      
      Change-Id: I277910f609e023ee5d5ff0129a80ecfce4356ede
      785fb92b
  8. 19 Oct, 2015 5 commits
    • Sandrine Bailleux's avatar
      Break down BL1 AArch64 synchronous exception handler · 1fe4d453
      Sandrine Bailleux authored
      The AArch64 synchronous exception vector code in BL1 is almost
      reaching its architectural limit of 32 instructions. This means
      there is very little space for this code to grow.
      
      This patch reduces the size of the exception vector code by
      moving most of its code in a function to which we branch from
      SynchronousExceptionA64.
      
      Change-Id: Ib35351767a685fb2c2398029d32e54026194f7ed
      1fe4d453
    • danh-arm's avatar
      Merge pull request #408 from sandrine-bailleux/sb/cassert · e662262f
      danh-arm authored
      Make CASSERT() macro callable from anywhere
      e662262f
    • danh-arm's avatar
      Merge pull request #407 from sandrine-bailleux/sb/fix-arm-bl1-setup-include · 3ef8f7af
      danh-arm authored
      Fix #include path in ARM platform BL1 setup code
      3ef8f7af
    • Sandrine Bailleux's avatar
      Make CASSERT() macro callable from anywhere · c17a4dc3
      Sandrine Bailleux authored
      The CASSERT() macro introduces a typedef for the sole purpose of
      triggering a compilation error if the condition to check is false.
      This typedef is not used afterwards. As a consequence, when the
      CASSERT() macro is called from withing a function block, the compiler
      complains and outputs the following error message:
      
        error: typedef 'msg' locally defined but not used [-Werror=unused-local-typedefs]
      
      This patch adds the "unused" attribute for the aforementioned
      typedef. This silences the compiler warning and thus makes the
      CASSERT() macro callable from within function blocks as well.
      
      Change-Id: Ie36b58fcddae01a21584c48bb6ef43ec85590479
      c17a4dc3
    • Sandrine Bailleux's avatar
      Fix #include path in ARM platform BL1 setup code · 3ae8a360
      Sandrine Bailleux authored
      This patch fixes the relative path to the 'bl1_private.h' header file
      included from 'arm_bl1_setup.c'. Note that, although the path was
      incorrect, it wasn't causing a compilation error because the header
      file still got included through an alternative include search path.
      
      Change-Id: I28e4f3dbe50e3550ca6cad186502c88a9fb5e260
      3ae8a360
  9. 14 Oct, 2015 2 commits
  10. 12 Oct, 2015 1 commit
    • Sandrine Bailleux's avatar
      Fix debug assertion in deprecated CCI-400 driver · 22b0eda5
      Sandrine Bailleux authored
      This patch fixes a copy and paste issue that resulted in the cluster
      indexes not being checked as intended. Note that this fix applies to
      the deprecated CCI-400 driver, not the unified one.
      
      Change-Id: I497132a91c236690e5eaff908f2db5c8c65e85ab
      22b0eda5
  11. 09 Oct, 2015 1 commit
    • Varun Wadekar's avatar
      TLKD: pass results with TLK_RESUME_FID function ID · ca15d9bc
      Varun Wadekar authored
      
      
      TLK sends the "preempted" event to the NS world along with an
      identifier for certain use cases. The NS world driver is then
      expected to take appropriate action depending on the identifier
      value. Upon completion, the NS world driver then sends the
      results to TLK (via x1-x3) with the TLK_RESUME_FID function ID.
      
      This patch uses the already present code to pass the results
      from the NS world to TLK for the TLK_RESUME_FID function ID.
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      ca15d9bc
  12. 07 Oct, 2015 1 commit
  13. 06 Oct, 2015 1 commit
    • Soby Mathew's avatar
      PSCI: Update state only if CPU_OFF is not denied by SPD · 16e05cdb
      Soby Mathew authored
      This patch fixes an issue in the PSCI framework where the affinity info
      state of a core was being set to OFF even when the SPD had denied the
      CPU_OFF request. Now, the state remains set to ON instead.
      
      Fixes ARM-software/tf-issues#323
      
      Change-Id: Ia9042aa41fae574eaa07fd2ce3f50cf8cae1b6fc
      16e05cdb
  14. 30 Sep, 2015 4 commits
  15. 28 Sep, 2015 2 commits
    • Sandrine Bailleux's avatar
      Bug fix in the SP804 dual timer driver · 54312877
      Sandrine Bailleux authored
      The generic delay timer driver expects a pointer to a timer_ops_t
      structure containing the specific timer driver information. It
      doesn't make a copy of the structure, instead it just keeps the
      pointer. Therefore, this pointer must remain valid over time.
      
      The SP804 driver doesn't satisfy this requirement. The
      sp804_timer_init() macro creates a temporary instanciation of the
      timer_ops_t structure on the fly and passes it to the generic
      delay timer. When this temporary instanciation gets deallocated,
      the generic delay timer is left with a pointer to invalid data.
      
      This patch fixes this bug by statically allocating the SP804
      timer_ops_t structure.
      
      Change-Id: I8fbf75907583aef06701e3fd9fabe0b2c9bc95bf
      54312877
    • Achin Gupta's avatar
      Merge pull request #398 from achingupta/vk/fix_bakery_lock_size · cdb8f1c8
      Achin Gupta authored
      Fix relocation of __PERCPU_BAKERY_LOCK_SIZE__ in PR #390
      cdb8f1c8
  16. 25 Sep, 2015 1 commit
    • Vikram Kanigiri's avatar
      Fix relocation of __PERCPU_BAKERY_LOCK_SIZE__ · 7173f5f6
      Vikram Kanigiri authored
      When a platform port does not define PLAT_PERCPU_BAKERY_LOCK_SIZE, the total
      memory that should be allocated per-cpu to accommodate all bakery locks is
      calculated by the linker in bl31.ld.S. The linker stores this value in the
      __PERCPU_BAKERY_LOCK_SIZE__ linker symbol. The runtime value of this symbol is
      different from the link time value as the symbol is relocated into the current
      section (.bss). This patch fixes this issue by marking the symbol as ABSOLUTE
      which allows it to retain its correct value even at runtime.
      
      The description of PLAT_PERCPU_BAKERY_LOCK_SIZE in the porting-guide.md has been
      made clearer as well.
      
      Change-Id: Ia0cfd42f51deaf739d792297e60cad5c6e6e610b
      7173f5f6
  17. 22 Sep, 2015 1 commit
  18. 14 Sep, 2015 1 commit
    • Achin Gupta's avatar
      Add a generic driver for ARM CCN IP · fd6007de
      Achin Gupta authored
      This patch adds a device driver which can be used to program the following
      aspects of ARM CCN IP:
      
      1. Specify the mapping between ACE/ACELite/ACELite+DVM/CHI master interfaces and
         Request nodes.
      2. Add and remove master interfaces from the snoop and dvm
         domains.
      3. Place the L3 cache in a given power state.
      4. Configuring system adress map and enabling 3 SN striping mode of memory
         controller operation.
      
      Change-Id: I0f665c6a306938e5b66f6a92f8549b529aa8f325
      fd6007de