- 13 Sep, 2019 1 commit
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Andre Przywara authored
The QEMU platform port scans its device tree to advertise PSCI as the CPU enable method. It does this by scanning *every* node in the DT and check whether its compatible string starts with "arm,cortex-a". Then it sets the enable-method to PSCI, if it doesn't already have one. Other platforms might want to use this functionality as well, so let's move it out of the QEMU platform directory and make it more robust by fixing some shortcomings: - A compatible string starting with a certain prefix is not a good way to find the CPU nodes. For instance a "arm,cortex-a72-pmu" node will match as well and is in turn favoured with an enable-method. - If the DT already has an enable-method, we won't change this to PSCI. Those two issues will for instance fail on the Raspberry Pi 4 DT. To fix those problems, we adjust the scanning method: The DT spec says that all CPU nodes are subnodes of the mandatory /cpus node, which is a subnode of the root node. Also each CPU node has to have a device_type = "cpu" property. So we find the /cpus node, then scan for a subnode with the proper device_type, forcing the enable-method to "psci". We have to restart this search after a property has been patched, as the node offsets might have changed meanwhile. This allows this routine to be reused for the Raspberry Pi 4 later. Change-Id: I00cae16cc923d9f8bb96a9b2a2933b9a79b06139 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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- 01 Aug, 2019 1 commit
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Julius Werner authored
NOTE: AARCH32/AARCH64 macros are now deprecated in favor of __aarch64__. All common C compilers pre-define the same macros to signal which architecture the code is being compiled for: __arm__ for AArch32 (or earlier versions) and __aarch64__ for AArch64. There's no need for TF-A to define its own custom macros for this. In order to unify code with the export headers (which use __aarch64__ to avoid another dependency), let's deprecate the AARCH32 and AARCH64 macros and switch the code base over to the pre-defined standard macro. (Since it is somewhat unintuitive that __arm__ only means AArch32, let's standardize on only using __aarch64__.) Change-Id: Ic77de4b052297d77f38fc95f95f65a8ee70cf200 Signed-off-by: Julius Werner <jwerner@chromium.org>
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- 26 Jul, 2019 2 commits
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Hongbo Zhang authored
This patch adds gicv3 support for qemu, in order not to break any legacy use case, gicv2 is still set by default, gicv3 can be selected by compiling parameter QEMU_USE_GIC_DRIVER=QEMU_GICV3. Signed-off-by: Hongbo Zhang <hongbo.zhang@linaro.org> Reviewed-by: Radoslaw Biernacki <radoslaw.biernacki@linaro.org> Tested-by: Radoslaw Biernacki <radoslaw.biernacki@linaro.org> Change-Id: Ic63f38abf16ed3c36aa60e80d50103cf05cf797b
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Hongbo Zhang authored
This file moves gicv2 codes to a new separate files, target is to add gicv3 support later. Signed-off-by: Hongbo Zhang <hongbo.zhang@linaro.org> Reviewed-by: Radoslaw Biernacki <radoslaw.biernacki@linaro.org> Tested-by: Radoslaw Biernacki <radoslaw.biernacki@linaro.org> Change-Id: I30eb1fda5ea5c2b35d79360c52f46601cbca1bcc
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- 28 Jun, 2019 2 commits
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Ambroise Vincent authored
Change-Id: Iab788e3e7cb2f83144255c4eb830712fd5cb6240 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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Ambroise Vincent authored
The new API becomes the default one. Change-Id: Ic1d602da3dff4f4ebbcc158b885295c902a24fec Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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- 12 Apr, 2019 1 commit
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Ambroise Vincent authored
The implementation of the heap function plat_get_mbedtls_heap() becomes mandatory for platforms supporting TRUSTED_BOARD_BOOT. The shared Mbed TLS heap default weak function implementation is converted to a helper function get_mbedtls_heap_helper() which can be used by the platforms for their own function implementation. Change-Id: Ic8f2994e25e3d9fcd371a21ac459fdcafe07433e Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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- 03 Apr, 2019 1 commit
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Ambroise Vincent authored
The default implementations are defined in crash_console_helpers.S. The platforms have to define plat_crash_console_*. Implemented placeholders for platforms that were missing helpers. Change-Id: Iea60b6f851956916e421dfd8c34a62d96eb9148e Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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- 01 Feb, 2019 2 commits
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Antonio Nino Diaz authored
Also, update platform_def.h guidelines about includes in the porting guide. Change-Id: I1ae338c9dd3242b309f6d53687ba2cb755d488c3 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Many parts of the code were duplicating symbols that are defined in include/common/bl_common.h. It is better to only use the definitions in this header. As all the symbols refer to virtual addresses, they have to be uintptr_t, not unsigned long. This has also been fixed in bl_common.h. Change-Id: I204081af78326ced03fb05f69846f229d324c711 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 15 Jan, 2019 1 commit
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Antonio Nino Diaz authored
The definitions in bl1/bl1_private.h and bl2/bl2_private.h are useful for platforms that may need to access them. Change-Id: Ifd1880f855ddafcb3bfcaf1ed4a4e0f121eda174 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 04 Jan, 2019 1 commit
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Antonio Nino Diaz authored
Enforce full include path for includes. Deprecate old paths. The following folders inside include/lib have been left unchanged: - include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH} The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them). For example, this patch had to be created because two headers were called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3 ("drivers: add tzc380 support"). This problem was introduced in commit 4ecca339 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems. Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged. Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 08 Nov, 2018 1 commit
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Antonio Nino Diaz authored
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards. The style that this project is now to use the full name of the file in capital letters followed by 'H'. For example, for a file called "uart_example.h", the header guard is UART_EXAMPLE_H. The exceptions are files that are imported from other projects: - CryptoCell driver - dt-bindings folders - zlib headers Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 01 Nov, 2018 1 commit
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Antonio Nino Diaz authored
The macro EL_IMPLEMENTED() has been deprecated in favour of the new function el_implemented(). Change-Id: Ic9b1b81480b5e019b50a050e8c1a199991bf0ca9 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 26 Oct, 2018 1 commit
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Antonio Nino Diaz authored
There are several platforms using arm_setup_page_tables(), which is supposed to be Arm platform only. This creates several dependency problems between platforms. This patch adds the definition XLAT_TABLES_LIB_V2 to the xlat tables lib v2 makefile. This way it is possible to detect from C code which version is being used and include the correct header. The file arm_xlat_tables.h has been renamed to xlat_tables_compat.h and moved to a common folder. This way, when in doubt, this header can be used to guarantee compatibility, as it includes the correct header based on XLAT_TABLES_LIB_V2. This patch also removes the usage of ARM_XLAT_TABLES_V1 from QEMU (so that is now locked in xlat lib v2) and ZynqMP (where it was added as a workaround). Change-Id: Ie1e22a23b44c549603d1402a237a70d0120d3e04 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 18 Oct, 2018 1 commit
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Jerome Forissier authored
Since upstream QEMU commit 14ec3cbd7c1e ("device_tree: Increase FDT_MAX_SIZE to 1 MiB"), which is included in release v2.12.1 and later, BL2 initialization fails with the following error (-3 is -FDT_ERR_NOSPACE): ERROR: Invalid Device Tree at 0x40000000: error -3 Increase PLAT_QEMU_DT_MAX_SIZE accordingly. Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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- 10 Oct, 2018 1 commit
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John Tsichritzis authored
The "Secure" prefix (S-ELx) is valid only for S-EL0 and S-EL1 but is meaningless for EL3, since EL3 is always secure. Hence, the "S" prefix has been removed from wherever it was used as "S-EL3". Change-Id: Icdeac9506d763f9f83d7297c7113aec7b85e9dbe Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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- 28 Sep, 2018 1 commit
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Antonio Nino Diaz authored
- Remove references to removed build options. - Remove support for LOAD_IMAGE_V2=0. - Migrate to sp_min_early_platform_setup2(). Change-Id: I884399139fb8e2554adeded888969f44672d56c0 Co-authored-by: Jens Wiklander <jens.wiklander@linaro.org> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 04 Sep, 2018 2 commits
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Jens Wiklander authored
Replaces deprecated early platform setup APIs * Replaces bl31_early_platform_setup() with bl31_early_platform_setup2() * Replaces bl2_early_platform_setup() with bl2_early_platform_setup2() Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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Jens Wiklander authored
The QEMU platform has only been used with LOAD_IMAGE_V2=1 for some time now and bit rot has occurred for LOAD_IMAGE_V2=0. To ease the maintenance make LOAD_IMAGE_V2=1 mandatory and remove the platform specific code for LOAD_IMAGE_V2=0. Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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- 22 Aug, 2018 1 commit
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Antonio Nino Diaz authored
The codebase was using non-standard headers. It is needed to replace them by the correct ones so that we can use the new libc headers. Change-Id: I530f71d9510cb036e69fe79823c8230afe890b9d Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 03 Aug, 2018 1 commit
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Roberto Vargas authored
TF Makefile was linking all the objects files generated for the fdt library instead of creating a static library that could be used in the linking stage. Change-Id: If3705bba188ec39e1fbf2322a7f2a9a941e1b90d Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 20 Jul, 2018 1 commit
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Antonio Nino Diaz authored
Also change header guards to fix defects of MISRA C-2012 Rule 21.1. Change-Id: Ied0d4b0e557ef6119ab669d106d2ac5d99620c57 Acked-by: Sumit Garg <sumit.garg@linaro.org> Acked-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 31 Mar, 2018 1 commit
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Michalis Pappas authored
Use the console_pl011_core_* functions directly in the crash console callbacks. This bypasses the MULTI_CONSOLE_API for the crash console (UART1), but allows using the crash console before the C runtime has been initialized (eg to call ASM_ASSERT). This retains backwards compatibility with respect to functionality when the old API is used. Use the MULTI_CONSOLE_API to register UART0 as the boot and runtime console. Fixes ARM-software/tf-issues#572 Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>
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- 26 Mar, 2018 1 commit
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Jonathan Wright authored
Ensure (where possible) that switch statements in plat comply with MISRA rules 16.1 - 16.7. Change-Id: Ie4a7d2fd10f6141c0cfb89317ea28a755391622f Signed-off-by: Jonathan Wright <jonathan.wright@arm.com>
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- 24 Mar, 2018 1 commit
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Michalis Pappas authored
Add crash_console_init declaration to console.h Only enable MULTI_CONSOLE_API for AArch64 Fixes ARM-software/tf-issues#571 Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>
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- 22 Mar, 2018 1 commit
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Michalis Pappas authored
Add support for the new MULTI_CONSOLE_API Crash information is now displayed in both the runtime and crash consoles, if a crash occurs after the runtime console has been enabled Enable MULTI_CONSOLE_API by default on qemu builds Fixes ARM-software/tf-issues#561 Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>
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- 20 Mar, 2018 1 commit
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Michalis Pappas authored
Allow qemu users to enable stack protection. Since the virt platform does not provide an RNG, use a basic, timer-based, canary generation, similarly to FVP. Increase SRAM size and BL2 size to fit images when stack protection is enabled. Notice that stack protection is not enabled by default in qemu. Fixes ARM-software/tf-issues#568 Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>
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- 04 Mar, 2018 1 commit
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Michalis Pappas authored
The register address range of UART1 (crash console) are outside the address ranges mapped for MMIO, resulting to an MMU abort when the device registers are accessed. Increase the size of DEVICE1 memory to include the range of UART1. Fixes ARM-software/tf-issues#560 Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>
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- 28 Feb, 2018 1 commit
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Michalis Pappas authored
Update qemu_configure_mmu_##_el to add an additional region for code, marked as MT_CODE | MT_SECURE. Update ro region attributes to NON_EXEC. Update calls to QEMU_CONFIGURE_BLx_MMU() to pass an additional region for code. Update calls to pass regions defined in common_def.h. Increase MAX_MMAP_REGIONS to 10. Enable SEPARATE_CODE_AND_RODATA by default on QEMU builds. Fixes ARM-software/tf-issues#558 Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>
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- 27 Feb, 2018 1 commit
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David Cunado authored
MISRA C-2012 Rule 7.3 violation: lowercase l shall not be used as literal suffixes. This patch resolves this for the ULL() macro by using ULL suffix instead of the ull suffix. Change-Id: Ia8183c399e74677e676956e8653e82375d0e0a01 Signed-off-by: David Cunado <david.cunado@arm.com>
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- 09 Feb, 2018 1 commit
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Santeri Salko authored
Function plat_ic_get_pending_interrupt_type() should return interrupt type, not id. The function is used in aarch64 exception handling and currently the irq/fiq forwarding fails if a secure interrupt happens while running normal world. The qemu-specific gic file does not contain any extra functionality so it can be removed and common file can be used instead. fixes arm-software/tf-issues#546 Signed-off-by: Santeri Salko <santeri.salko@gmail.com>
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- 05 Feb, 2018 1 commit
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Etienne Carriere authored
Define Qemu AArch32 implementation for some platform functions (core position, secondary boot cores, crash console). These are derived from the AArch64 implementation. BL31 on Qemu is needed only for ARMv8 and later. On ARMv7, BL32 is the first executable image after BL2. Support SP_MIN and OP-TEE as BL32: create a sp_min make script target in Qemu, define mapping for IMAGE_BL32 Minor fix Qemu return value type for plat_get_ns_image_entrypoint(). Qemu model for the Cortex-A15 does not support the virtualization extension although the core expects it. To overcome the issue, Qemu ARMv7 configuration set ARCH_SUPPORTS_VIRTUALIZATION to 0. Add missing AArch32 assembly macro arm_print_gic_regs from ARM platform used by the Qemu platform. Qemu Cortex-A15 model integrates a single cluster with up to 4 cores. Change-Id: I65b44399071d6f5aa40d5183be11422b9ee9ca15 Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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- 01 Feb, 2018 2 commits
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Masahiro Yamada authored
In the next commit, I need the image name in lowercase because output files are generally named in lowercase. Unfortunately, TOOL_ADD_IMG takes the first argument in uppercase since we generally use uppercase Make variables. make_helpers/build_macros.mk provides 'uppercase' macro to convert a string into uppercase, but 'lowercase' does not exist. We can implement it if we like, but it would be more straightforward to change the argument of TOOL_ADD_IMG. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Now FIP_ADD_IMG takes care of both fiptool and cert_create symmetrically. Rename it so that it matches the behavior. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 30 Nov, 2017 1 commit
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David Cunado authored
Pre-v8.2 platforms such as the Juno platform does not have the Scalable Vector Extensions implemented and so the build option ENABLE_SVE is set to zero. This has a minor performance improvement with no functional impact. Change-Id: Ib072735db7a0247406f8b60e325b7e28b1e04ad1 Signed-off-by: David Cunado <david.cunado@arm.com>
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- 02 Nov, 2017 1 commit
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Etienne Carriere authored
Registered interrupts are configured in edge detection as the default previous configuration assumed in previous code. Not target mask required as Qemu BL31 will not send/route SGIs. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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- 26 Oct, 2017 1 commit
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Etienne Carriere authored
OP-TEE dedicates the end of the Qemu secure DRAM as specific out-of-TEE secure RAM. To support this configuration the trusted firmware should not load OP-TEE resources in this area. To overcome the issue, OP-TEE pageable image is now loaded 2MByte above the secure RAM base address. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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- 25 Oct, 2017 1 commit
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Michalis Pappas authored
This patch adds support for TBB to qemu. An RSA ROT keypair is generated at build time and is included into BL1/BL2. The key and content certificates are read over semihosting. Fixes ARM-software/tf-issues#526 Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>
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- 24 Oct, 2017 1 commit
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Etienne Carriere authored
Before this change, plat_secondary_cold_boot_setup reads wake up mailbox as a byte array but through 64bit accesses on unaligned 64bit addresses. In the other hand qemu_pwr_domain_on wakes secondary cores by writing into a 64bit array. This change forces the 64bit mailbox format as PLAT_QEMU_HOLD_ENTRY_SIZE explicitly specifies it. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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