- 20 Apr, 2021 1 commit
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Lad Prabhakar authored
Move ddr driver code to common directory, so that the same code can be re-used by both R-Car Gen3 and RZ/G2 platforms. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Change-Id: I9aef73d3e9a027a127ce7483b72d339559866727
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- 06 Jan, 2020 1 commit
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Marek Vasut authored
Now that DDR drivers are mostly cleaned up , move them out of staging. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I9de63f847a0ef9ac27a79fb0f848c351fd7f4da6
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- 29 Aug, 2019 2 commits
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Marek Vasut authored
Clean up the DDR B header files and remove checkpatch errors. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I9648ef5511df299688fd5284513812d32a1f8064
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Marek Vasut authored
Do basic automated checkpatch fixes on the ddr_b, no functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Ie401ec049a05d2c4c8044749994391adea171679
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- 12 Jul, 2019 1 commit
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Chiaki Fujii authored
[IPL/DDR] - Update H3, M3, M3N DDR setting rev.0.36. Signed-off-by: Chiaki Fujii <chiaki.fujii.wj@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Ia4fc9456876a14a9cf3ced93163477974f6cc8bf
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- 17 Oct, 2018 1 commit
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Jorge Ramirez-Ortiz authored
- ddr - pfc [pin function controller] - qos [bandwidth] checkpatch.pl is generating too many errors.
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