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The FVP platform has a few filenames that begin with fvp_.  These are
renamed to plat_ to make it easier to use the FVP port as a template.

Change-Id: I601e6256d5ef3bae81a2e1f5df6de56db5b27069
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>

Add the 'help' target to the Makefile to present a brief guide to the
various build options available.

Change-Id: Ic3a3489860b6362eb236470ea6b43a16a1b2fe3a
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>

Tidy up the spacing of variable definitions within the makefiles to make
them more consistent, easier to read and amend.

Change-Id: Ic6d7c8489ca4330824abb5cd1ead8f1d449d1a85
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>

Move all explicit platform or architecture specific references
into a new platform.mk file that is defined for each platform.

Change-Id: I9d6320d1ba957e0cc8d9b316b3578132331fa428
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>

This patch replaces the empty definition of display_boot_progress() in
bl2_main.c with a weak definition. The former allowed bl2 to use the
early_exceptions(). It is possible to do that with a simple weak
definition as well.

Change-Id: Idb3f425a5e265f3579b638e3d26bd8c9bb78f80d

Ctags seem to have a problem with generating tags for assembler symbols
when a comment immediately follows an assembly label.

This patch inserts a single space character between the label
definition and the following comments to help ctags.

The patch is generated by the command:

  git ls-files -- \*.S | xargs sed -i 's/^\([^:]\+\):;/\1: ;/1'

Change-Id: If7a3c9d0f51207ea033cc8b8e1b34acaa0926475

The GICv3 distributor can have more ports than CPUs are available in
the system. Probe all re-distributors and use the matching affinity
levels as specified by each core and re-distributor to decide which
re-distributor to use with which CPU core.

If a core cannot be matched with a re-distributor, the core panics and
is placed in an endless loop.

Change-Id: Ie393cfe07c7449a2383959e3c968664882e18afc

Traps when accessing architectural features are disabled by clearing bits
in CPTR_EL3 during early boot, including accesses to floating point
registers. The value of this register was previously undetermined, causing
unwanted traps to EL3. Future EL3 code (for example, context save/restore
code) may use floating point registers, although they are not used by current
code.

Also, the '-mgeneral-regs-only' flag is enabled in the GCC settings to
prevent generation of code that uses floating point registers.

Change-Id: I9a03675f6387bbbee81a6f2c9ccf81150db03747

Change-Id: Ic7fb61aabae1d515b9e6baf3dd003807ff42da60

Update documentation to refer to separate issue tracking
repository, https://github.com/ARM-software/tf-issues/issues.

Change-Id: Ib1cef65b0da420bec58290d8743eb069b1226c96

GIC setup code which used to be in bl31_plat_setup.c is now in fvp_gic.c
to simplify future changes to other bootloader stages.  This patch moves
code from bl31_plat_setup.c to fvp_gic.c, simplifies the include file
list for bl31_plat_setup.c, moves GIC declarations from the bl31.h header
file into the platform.h, and reworks files according to coding style
guide.

Change-Id: I48d82a4ba33e7114dcc88f9ca98767a06cf8f417

Tighten up ISO C standard checking. Fix 'CASSERT' implementation to
conform to C99 as opposed to GNU99 standard.

Change-Id: I58ddc61913617b66f11da5b6e3f7363136d5cf7d

In order to reduce the software dependency on the compiler, the project
is now compiled with the '-ffreestanding' flag. This is to prevent GCC
from replacing functions with more optimised versions. An example is
where GCC replaces a simple printf() with a puts().

Change-Id: I1973fe6957cd708e8432a0039af9d50e037bd884

SPSR is a 32-bit register and so its size should be reflected in
the gp_regs structure.  This patch fixes the type of gp_regs.spsr
to use a 32-bit variable.  It also makes the size of the other
register fields more explicit.

Change-Id: I27e0367df1a91cc501d5217c1b3856d4097c60ba

- Update porting guide to describe where files live and how to get
  FreeBSD source code.
- Update change-log to describe relocation and new functions.

Change-Id: Id8f30cc7bafdd1064b3a5c5aae958c5aa3fb79f3

Change-Id: I3659e119a242f8ef828e32bfdf5d0b4b7ac4f716

- This change is split into two separate patches in order to
  simplify the history as interpreted by 'git'. The split is
  between the move/rename and addition of new files.
- Remove dependency on toolchain C library headers and functions in
  order to ensure behavioural compatibility between toolchains.
- Use FreeBSD as reference for C library implementation.
- Do not let GCC use default library include paths.
- Remove unused definitions in modified headers and implementations.
- Move C library files to 'lib/stdlib' and 'include/stdlib'.
- Break std.c functions out into separate files.

Change-Id: I3e3d8d992052264d2a02489034ae4c03bf0f5512

- This change is split into two separate patches in order to
  simplify the history as interpreted by 'git'. The split is
  between the move/rename and addition of new files.
- Remove dependency on toolchain C library headers and functions in
  order to ensure behavioural compatibility between toolchains.
- Use FreeBSD as reference for C library implementation.
- Do not let GCC use default library include paths.
- Remove unused definitions in modified headers and implementations.
- Move C library files to 'lib/stdlib' and 'include/stdlib'.
- Break std.c functions out into separate files.

Change-Id: I91cddfb3229775f770ad781589670c57d347a154

- Add 'debug.h' with INFO, WARN and ERROR macros.
- This prints the specified message with the appropriate tag.
- INFO and WARN messages are only displayed when building with
  the DEBUG flag set. Error messages are always printed.

Change-Id: I21835b6063fcc99649b30ac7489387cbd3705bc0

ns_entry_info used to be a per-cpu array.  This is a waste of space
because it is only accessed by the primary CPU on the cold boot path.
This patch reduces ns_entry_info to a single-cpu area.

Change-Id: I647c70c4e76069560f1aaad37a1d5910f56fba4c

Change-Id: Icef68e314e6ba0f3694189b57f4b1dbbea5ba255

RUN_IMAGE constant is used by all bootloader stages.

Change-Id: I1b4e28d8fcf3ad1363f202c859f5efab0f320efe

Platform setup code has to reserve some memory for storing the
memory layout information.  It is populated in early platform setup
code.

blx_get_sec_mem_layout() functions used to return a copy of this
structure.  This patch modifies blx_get_sec_mem_layout() functions
so that they now directly return a pointer to their memory layout
structure.  It ensures that the memory layout returned by
blx_get_sec_mem_layout() is always up-to-date and also avoids a
useless copy of the meminfo structure.

Also rename blx_get_sec_mem_layout() to blx_plat_sec_mem_layout()
to make it clear those functions are platform specific.

Change-Id: Ic7a6f9d6b6236b14865ab48a9f5eff545ce56551

This patch makes changes to the documents to reflect the current
state of play of the psci cpu_suspend function.

Change-Id: I086509fb75111b6e9f93b7f6dbcd33cc4591b9f3

This patch performs a major rework of the psci generic implementation
to achieve the following:

1. replace recursion with iteration where possible to aid code
   readability e.g. affinity instance states are changed iteratively
   instead of recursively.

2. acquire pointers to affinity instance nodes at the beginning of a
   psci operation. All subsequent actions use these pointers instead
   of calling psci_get_aff_map_node() repeatedly e.g. management of
   locks has been abstracted under functions which use these pointers
   to ensure correct ordering. Helper functions have been added to
   create these abstractions.

3. assertions have been added to cpu level handlers to ensure correct
   state transition

4. the affinity level extents specified to various functions have the
   same meaning i.e. start level is always less than the end level.

Change-Id: If0508c3a7b20ea3ddda2a66128429382afc3dfc8

This patch:

1. removes a duplicate assertion to check that the only error
   condition that can be returned while turning a cpu off is
   PSCI_E_DENIED. Having this assertion after calling
   psci_afflvl_off() is sufficient.

2. corrects some incorrect usage of 'its' vs 'it is'

3. removes some unwanted white spaces

Change-Id: Icf014e269b54f5be5ce0b9fbe6b41258e4ebf403

In fvp_affinst_on/suspend, the non-secure entrypoint is always
expected to lie in the DRAM. This check will not be valid if
non-secure code executes directly out of flash e.g. a baremetal
test. This patch removes this check.

Change-Id: I0436e1138fc394aae8ff1ea59ebe38b46a440b61

This patch removes the duplicate declaration of psci_cpu_on in psci.h
and moves the constants for the system level implementation of the
generic timer from arch_helpers.h to arch.h. All other architectural
constants are defined in arch.h so there is no need to add them to
arch_helpers.h

Change-Id: Ia8ad3f91854f7e57fce31873773eede55c384ff1

In the previous psci implementation, the psci_afflvl_power_on_finish()
function would run into an error condition if the value of the context
id parameter in the cpu_on and cpu_suspend psci calls was != 0. The
parameter was being restored as the return value of the affinity level
0 finisher function. A non zero context id would be treated as an
error condition. This would prevent successful wake up of the cpu from
a power down state. Also, the contents of the general purpose
registers were not being cleared upon return to the non-secure world
after a cpu power up. This could potentially allow the non-secure
world to view secure data.

This patch ensures that all general purpose registers are set to ~0
prior to the final eret that drops the execution to the non-secure
world. The context id is used to initialize the general purpose
register x0 prior to re-entry into the non-secure world and is no
longer restored as a function return value. A platform helper
(platform_get_stack()) has been introduced to facilitate this change.

Change-Id: I2454911ffd75705d6aa8609a5d250d9b26fa097c

This patch fixes the following constant values in the psci.h:

1. The affinity level shift value in the power_state parameter of the
   cpu_suspend psci call. The previous value was preventing shutdown
   of the affinity level 1.

2. The values used for affinity state constants (ON, OFF,
   ON_PENDING). They did not match the values expected to be returned
   by the affinity_info psci api as mentioned in the spec.

3. The state id shift value in the power_state parameter of the
   cpu_suspend psci call.

Change-Id: I62ed5eb0e9640b4aa97b93923d6630e6b877a097

The FVP specific code that gets called after a cpu has been physically
powered on after having been turned off or suspended earlier does not
clear the PWRC.PWKUPR.WEN bit. Not doing so causes problems if: a cpu
is suspended, woken from suspend, powered down through a cpu_off call
& receives a spurious interrupt. Since the WEN bit is not cleared
after the cpu woke up from suspend, the spurious wakeup will power the
cpu on. Since the cpu_off call clears the jump address in the mailbox
this spurious wakeup will cause the cpu to crash.

This patch fixes this issue by clearing the WEN bit whenever a cpu is
powered up.

Change-Id: Ic91f5dffe1ed01d76bc7fc807acf0ecd3e38ce5b

The runtime exception handling assembler code used magic numbers for
saving and restoring the general purpose register context on stack
memory. The memory is interpreted as a 'gp_regs' structure and the
magic numbers are offsets to members of this structure. This patch
replaces the magic number offsets with constants. It also adds compile
time assertions to prevent an incorrect assembler view of this
structure.

Change-Id: Ibf125bfdd62ba3a33e58c5f1d71f8c229720781c

- Add instructions for contributing to ARM Trusted Firmware.

- Update copyright text in all files to acknowledge contributors.

Change-Id: I9311aac81b00c6c167d2f8c889aea403b84450e5

This patch updates the user guide section about the memory layout.
  - Explain the verifications that the linker scripts does on the
    global memory layout.
  - Refer to the new linker symbols.
  - Describe the linker symbols exported to the trusted firmware code.

Change-Id: I033ab2b867e8b9776deb4185b9986bcb8218f286

This patch makes sure the C runtime environment is properly
initialised before executing any C code.

  - Zero-initialise NOBITS sections (e.g. the bss section).
  - Relocate BL1 data from ROM to RAM.

Change-Id: I0da81b417b2f0d1f7ef667cc5131b1e47e22571f

  - Check at link-time that bootloader images will fit in memory
    at run time and that they won't overlap each other.
  - Remove text and rodata orphan sections.
  - Define new linker symbols to remove the need for platform setup
    code to know the order of sections.
  - Reduce the size of the raw binary images by cutting some sections
    out of the disk image and allocating them at load time, whenever
    possible.
  - Rework alignment constraints on sections.
  - Remove unused linker symbols.
  - Homogenize linker symbols names across all BLs.
  - Add some comments in the linker scripts.

Change-Id: I47a328af0ccc7c8ab47fcc0dc6e7dd26160610b9

Change-Id: I56284ebf63bef99de1beb4fd86e2d8b6a7962ac0

A single binary can be compiled using a command such as:
  make CROSS_COMPILE=aarch64-none-elf- bl1

Also make use of brackets consistent in the Makefile.

Change-Id: I2180fdb473411ef7cffe39670a7b2de82def812e

- Large RAM-disks may have trouble starting with 2GB of memory.
- Increase from 2GB to 4GB in FDT.

Change-Id: I12c1b8e5db41114b88c69c48621cb21247a6a6a7

On FVP platforms, for now it is assumed that the normal-world
bootloader is already sitting in its final memory location.
Therefore, BL2 doesn't need to load it and so it doesn't need
to know the extents of the non-trusted DRAM.

Change-Id: I33177ab43ca242edc8958f2fa8d994e7cf3e0843