- 20 Jan, 2020 1 commit
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Lionel Debieve authored
Add new flags for storage support that must be used in the build command line. Add the complete build steps for an OP-TEE configuration. Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Change-Id: I0c682f6eb0aab83aa929f4ba734d3151c264aeed
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- 15 Jan, 2020 1 commit
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Siva Durga Prasad Paladugu authored
This patch makes default build target as silicon instead of QEMU. The default can be overwritten by specifying it through build flag VERSAL_PLATFORM. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Change-Id: Ia4cb1df1f206db3e514e8ce969acca875e973ace
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- 14 Jan, 2020 1 commit
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Jan Kiszka authored
It's in fact mandatory. Seen with RPi firmware 1.20190925. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Change-Id: I80739b74f25817294adc52cfd26a3ec59c06f892
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- 10 Jan, 2020 1 commit
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Madhukar Pappireddy authored
This toolchain provides multiple cross compilers and are publicly available on developer.arm.com We build TF-A in CI using: AArch32 bare-metal target (arm-none-eabi) AArch64 ELF bare-metal target (aarch64-none-elf) Change-Id: I910200174d5bad985504d1af4a1ae5819b524003 Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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- 08 Jan, 2020 1 commit
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Mark Dykes authored
This reverts commit de9bf1d8. Change-Id: Iebb6297ce290a10ee850bf6a9c71e7eb530b085f
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- 03 Jan, 2020 1 commit
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Madhukar Pappireddy authored
This toolchain provides multiple cross compilers and are publicly available on www.developer.arm.com We thoroughly test TF-A in CI using: AArch32 bare-metal target (arm-none-eabi) AArch64 ELF bare-metal target (aarch64-none-elf) Change-Id: I2360a3ac6705c68dca781b85e9894867df255b3e Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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- 10 Dec, 2019 1 commit
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Varun Wadekar authored
This patch adds the Tegra194 SoC information to the nvidia-tegra.rst file. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Change-Id: Id649a5ff1b3f70eeee34b508edb7965e7b7a2454
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- 27 Nov, 2019 1 commit
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Paul Beesley authored
The User Guide document has grown organically over time and now covers a wide range of topics, making it difficult to skim read and extract information from. Currently, it covers these topics and maybe a couple more: - Requirements (hardware, tools, libs) - Checking out the repo - Basic build instructions - A comprehensive list of build flags - FIP packaging - Building specifically for Juno - Firmware update images - EL3 payloads - Preloaded BL33 boot flow - Running on FVPs - Running on Juno I have separated these out into a few groups that become new documents. Broadly speaking, build instructions for the tools, for TF-A generally, and for specific scenarios are separated. Content relating to specific platforms (Juno and the FVPs are Arm-specific platforms, essentially) has been moved into the documentation that is specific to those platforms, under docs/plat/arm. Change-Id: Ica87c52d8cd4f577332be0b0738998ea3ba3bbec Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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- 22 Oct, 2019 1 commit
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Paul Beesley authored
A small set of misc changes to ensure correctness before the v2.2 release tagging. Change-Id: I888840b9483ea1a1633d204fbbc0f9594072101e Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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- 21 Oct, 2019 1 commit
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Paul Beesley authored
The list of upstream platforms on the index page is growing quite long, especially with all the FVP variants being listed individually. This patch leverages the "Platform Ports" chapter in the docs table of contents to condense this information. Almost all platform ports now have documentation, so the table of contents serves as the list of upstream platforms by itself. For those upstream platforms that do not have corresponding documentation, the top-level "Platform Ports" page mentions them individually. It also mentions each Arm FVP, just as the index page did before. Note that there is an in-progress patch that creates new platform port documentation for the Arm Juno and Arm FVP platforms, so this list of "other platforms" will soon be reduced further as those platforms become part of the table of contents as well. Change-Id: I6b1eab8cba71a599d85a6e22553a34b07f213268 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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- 11 Oct, 2019 1 commit
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Paul Beesley authored
Tidying up a few Sphinx warnings that had built-up over time. None of these are critical but it cleans up the Sphinx output. At the same time, fixing some spelling errors that were detected. Change-Id: I38209e235481eed287f8008c6de9dedd6b12ab2e Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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- 08 Oct, 2019 1 commit
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Paul Beesley authored
Currently links between documents are using the format: <path/to/><filename>.rst This was required for services like GitHub because they render each document in isolation - linking to another document is like linking to any other file, just provide the full path. However, with the new approach, the .rst files are only the raw source for the documents. Once the documents have been rendered the output is now in another format (HTML in our case) and so, when linking to another document, the link must point to the rendered version and not the .rst file. The RST spec provides a few methods for linking between content. The parent of this patch enabled the automatic creation of anchors for document titles - we will use these anchors as the targets for our links. Additional anchors can be added by hand if needed, on section and sub-section titles, for example. An example of this new format, for a document with the title "Firmware Design" is :ref:`Firmware Design`. One big advantage of this is that anchors are not dependent on paths. We can then move documents around, even between directories, without breaking any links between documents. Links will need to be updated only if the title of a document changes. Change-Id: I9e2340a61dd424cbd8fd1ecc2dc166f460d81703 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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- 07 Oct, 2019 1 commit
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Paul Beesley authored
Add meson-g12a, qemu-sbsa and rpi4 to the documentation index so that they will have their docs rendered and integrated into the table of contents. Change-Id: Id972bf2fee67312dd7bff29f92bea67842e62431 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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- 01 Oct, 2019 1 commit
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Radoslaw Biernacki authored
This patch introduces Qemu SBSA platform. Both platform specific files where copied from qemu/qemu with changes for DRAM base above 32bit and removal of ARMv7 conditional defines/code. Documentation is aligned to rest of SBSA patches along the series and planed changes in edk2-platform repo. Fixes ARM-software/tf-issues#602 Signed-off-by: Radoslaw Biernacki <radoslaw.biernacki@linaro.org> Change-Id: I8ebc34eedb2268365e479ef05654b2df1b99128c
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- 26 Sep, 2019 1 commit
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Carlo Caione authored
Introduce the preliminary support for the Amlogic S905X2 (G12A) SoC. This port is a minimal implementation of BL31 capable of booting mainline U-Boot and Linux. Tested on a SEI510 board. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: Ife958f10e815a4530292c45446adb71239f3367f
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- 25 Sep, 2019 2 commits
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Paul Beesley authored
This patch: - Adds any leftover platform ports that were not having their documentation built (not in the index.rst table of contents) - Corrects a handful of RST formatting errors that cause poor rendering - Reorders the list of platforms so that they are displayed in alphabetical order Change-Id: If8c135a822d581c3c5c4fca2936d501ccfd2e94c Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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Andre Przywara authored
As the Raspberry Pi4 port is now in a usable state, add the build instructions together with some background information to the documentation directory. The port differs quite a bit from the Raspberry Pi 3, so we use a separate file for that. Change-Id: I7d9f5967fdf3ec3bfe97d78141f59cbcf03388d4 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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- 20 Sep, 2019 1 commit
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Paul Beesley authored
The documentation for Marvell platforms was not included in the rendered document output until now because, while it was mostly valid RST format, the files were saved with a .txt extension. This patch corrects some RST formatting errors, creates a document tree (index page) for the Marvell documents, and adds the Marvell subtree to the main index. Change-Id: Id7d4ac37eded636f8f62322a153e1e5f652ff51a Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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- 17 Jul, 2019 1 commit
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Hadi Asyrafi authored
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: Ib2ad2068abdf0b204c5cb021ea919581adaca4ef
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- 09 Jul, 2019 1 commit
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XiaoDong Huang authored
px30 is a Quad-core soc and Cortex-a53 inside. This patch supports the following functions: 1. basic platform setup 2. power up/off cpus 3. suspend/resume cpus 4. suspend/resume system 5. reset system 6. power off system Change-Id: I73d55aa978096c078242be921abe0ddca9e8f67e Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
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- 08 Jul, 2019 1 commit
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John Tsichritzis authored
Change-Id: Ibdee91ad337ee362872924d93e82f5b5e47e63d9 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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- 17 Jun, 2019 1 commit
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Yann Gautier authored
U-Boot should be compiled with stm32mp15_trusted_defconfig which is supported since tag v2019.07-rc1 with commit [1]. The creation of the U-Boot binary with stm32 header is done at U-Boot compilation step, it is no more required to call the extra command. [1] https://git.denx.de/?p=u-boot.git;a=commit;h=015289580f81 Change-Id: Ia875c22184785fc2e02ad07993a649069cd5ce34 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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- 22 May, 2019 4 commits
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Paul Beesley authored
The documentation contains plenty of notes and warnings. Enable special rendering of these blocks by converting the note prefix into a .. note:: annotation. Change-Id: I34e26ca6bf313d335672ab6c2645741900338822 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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Paul Beesley authored
Several code blocks do not specify a language for syntax highlighting. This results in Sphinx using a default highlighter which is Python. This patch adds the correct language to each code block that doesn't already specify it. Change-Id: Icce1949aabfdc11a334a42d49edf55fa673cddc3 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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Paul Beesley authored
These are no longer needed as there will always be a table of contents rendered to the left of every page. Some of these lists can be quite long and, when opening a page, the reader sees nothing but a huge list of contents! After this patch, the document contents are front-and-centre and the contents are nicely rendered in the sidebar without duplication. Change-Id: I444754d548ec91d00f2b04e861de8dde8856aa62 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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Paul Beesley authored
The platform port documents are not very standardised right now and they don't integrate properly into the document tree so: 1) Make sure each port has a proper name and title (incl. owner) 2) Correct use of headings, subheadings, etc in each port 3) Resolve any naming conflicts between documents Change-Id: I4c2da6f57172b7f2af3512e766ae9ce3b840b50f Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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- 21 May, 2019 1 commit
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Paul Beesley authored
This change creates the following directories under docs/ in order to provide a grouping for the content: - components - design - getting_started - perf - process In each of these directories an index.rst file is created and this serves as an index / landing page for each of the groups when the pages are compiled. Proper layout of the top-level table of contents relies on this directory/index structure. Without this patch it is possible to build the documents correctly with Sphinx but the output looks messy because there is no overall hierarchy. Change-Id: I3c9f4443ec98571a56a6edf775f2c8d74d7f429f Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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- 10 May, 2019 1 commit
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kenny liang authored
- Add basic platform setup - Add generic CPU helper functions - Add delay timer platform implementation - Use TI 16550 uart driver Change-Id: I1c29569c68fe9fca5e10e88a22a29690bab7141f Signed-off-by: kenny liang <kenny.liang@mediatek.com>
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- 26 Apr, 2019 1 commit
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Manivannan Sadhasivam authored
Since STM32MP1 platform supports different boards, it is necessary to build for a particular board. With the current instructions, the user has to modify the DTB_FILE_NAME variable in platform.mk for building for a particular board, but this can be avoided by passing the appropriate board DTB name via DTB_FILE_NAME make variable. Hence document the same in platform doc. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Change-Id: I16797e7256c7eb699a7b8846356fe430d0fe0aa1
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- 25 Apr, 2019 1 commit
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Heiko Stuebner authored
This adds a rockchip.rst to docs/plat documenting the general approach to using the Rockchip ATF platforms together with the supported bootloaders and also adds myself as maintainer after making sure Tony Xie is ok with that. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Change-Id: Idce53d15eff4ac6de05bbb35d86e57ed50d0cbb9
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- 23 Apr, 2019 1 commit
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Yann Gautier authored
Support booting OP-TEE as BL32 boot stage and secure runtime service. OP-TEE executes in internal RAM and uses a secure DDR area to store the pager pagestore. Memory mapping and TZC are configured accordingly prior OP-TEE boot. OP-TEE image is expected in OP-TEE v2 format where a header file describes the effective boot images. This change post processes header file content to get OP-TEE load addresses and set OP-TEE boot arguments. Change-Id: I02ef8b915e4be3e95b27029357d799d70e01cd44 Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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- 02 Apr, 2019 1 commit
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Remi Pommarel authored
Also adds a maintainer for GXL. Signed-off-by: Remi Pommarel <repk@triplefau.lt>
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- 13 Mar, 2019 1 commit
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Jacky Bai authored
The i.MX8M Mini is new SOC of the i.MX8M family. it is focused on delivering the latest and greatest video and audio experience combining state-of-the-art media-specific features with high-performance processing while optimized for lowest power consumption. The i.MX 8M Mini Media Applications Processor is 14nm FinFET product of the growing i.MX8M family targeting the consumer & industrial market. It is built in 14LPP to achieve both high performance and low power consumption and relies on a powerful fully coherent core complex based on a quad Cortex-A53 cluster with video and graphics accelerators this patch add the basic support for i.MX8MM. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
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- 27 Feb, 2019 1 commit
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Varun Wadekar authored
This patch provides support for using the scatterfile format as the linker script with the 'armlink' linker for Tegra platforms. In order to enable the scatterfile usage the following changes have been made: * provide mapping for ld.S symbols in bl_common.h * include bl_common.h from all the affected files * update the makefile rules to use the scatterfile and armlink to compile BL31 * update pubsub.h to add sections to the scatterfile NOTE: THIS CHANGE HAS BEEN VERIFIED WITH TEGRA PLATFORMS ONLY. Change-Id: I7bb78b991c97d74a842e5635c74cb0b18e0fce67 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 26 Feb, 2019 1 commit
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Tien Hock, Loh authored
This adds BL31 support to Intel Stratix10 SoCFPGA platform. BL31 in TF-A supports: - PSCI calls to enable 4 CPU cores - PSCI mailbox calls for FPGA reconfiguration Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
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- 20 Feb, 2019 1 commit
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Yann Gautier authored
A link to st.com page describing STM32MP1 is added. Add the information about Cortex-M4 embedded in STM32MP1. Correct typo for u-boot command. Change-Id: Ie900f6ee59461c5e7ad8a8b06854abaf41fca3ce Signed-off-by: Yann Gautier <yann.gautier@st.com>
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- 19 Feb, 2019 1 commit
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Usama Arif authored
This documentation contains information about the boot sequence, code location and build procedure for fvp_ve platform. Change-Id: I339903f663cc625cfabc75ed8e4accb8b2c3917c Signed-off-by: Usama Arif <usama.arif@arm.com>
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- 08 Feb, 2019 1 commit
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Paul Beesley authored
Using Sphinx linkcheck on the TF-A docs revealed some broken or permanently-redirected links. These have been updated where possible. Change-Id: Ie1fead47972ede3331973759b50ee466264bd2ee Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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- 05 Feb, 2019 1 commit
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Varun Wadekar authored
This patch adds information about the Tegra186 platforms to the docs. Change-Id: I69525c60a0126030dc15505ec7f02ccf8250be6f Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 18 Jan, 2019 1 commit
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Varun Wadekar authored
The non secure world would like to profile the boot path for the EL3 and S-EL1 firmwares. To allow it to do that, a non-secure DRAM region (4K) is allocated and the base address is passed to the EL3 firmware. This patch adds a library to allow the platform code to store the tag:timestamp pair to the shared memory. The tegra platform code then uses the `record` method to add timestamps. Original change by Akshay Sharan <asharan@nvidia.com> Change-Id: Idbbef9c83ed84a508b04d85a6637775960dc94ba Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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