- 24 Oct, 2018 4 commits
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Antonio Nino Diaz authored
When a device tree blob is present at a known address, instead of, for example, relying on the user modifying the Linux command line to warn about the memory reserved for the Trusted Firmware, pass it on the DTB. The current code deletes the memory reserved for the default bootstrap of the Raspberry Pi and adds the region used by the Trusted Firmware. This system replaces the previous one consisting on adding ``memmap=16M$256M`` to the Linux command line. It's also meant to be used by U-Boot and any other bootloader that understands DTB files. Change-Id: I13ee528475fb043d6e8d9e9f24228e37ac3ac436 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Niño Díaz authored
Update libfdt to version 1.4.7
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Antonio Niño Díaz authored
plat/arm/scmi: introduce plat_css_get_scmi_info API
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Antonio Niño Díaz authored
AArch64: Enable lower ELs to use pointer authentication
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- 23 Oct, 2018 9 commits
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Antonio Nino Diaz authored
Change-Id: Iad7adaf0b16a3d086594cb3432210ac2c4e207f8 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
The current version of libfdt (1.4.2) has been modified to integrate it in this repository. In order to do a clean import it is needed to remove the current version first. Change-Id: I2cab8c8e5632280d282fa7a2f2339768a0ad1e0f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Version 1.4.7 of libfdt is bigger than the current one (1.4.2) and the current reserved space for BL2 in Juno isn't enough to fit the Trusted Firmware when compiling with clang or armclang. Change-Id: I7b73394ca60d17f417773f56dd5b3d54495a45a8 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: I3ddc07cb02d73cd7614af7a5b21827aae155f9a0 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Imported from lib/libc/string/strrchr.c from commit: 59fd2fb98e4cc7e9bfc89598e28e21d405fd470c Change-Id: I898206c6f0372d4d211c149ec0fb9522d0a5b01c Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Niño Díaz authored
qemu: increase PLAT_QEMU_DT_MAX_SIZE to 1 MiB
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Antonio Niño Díaz authored
Makefile: Fix verbose builds on Windows
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Antonio Niño Díaz authored
tzc: Fix MISRA defects
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Antonio Nino Diaz authored
The definitions FAIL_CONTROL_*_SHIFT were incorrect, they have been fixed. The types tzc_region_attributes_t and tzc_action_t have been removed and replaced by unsigned int because it is not allowed to do logical operations on enums. Also, fix some address definitions in arm_def.h. Change-Id: Id37941d76883f9fe5045a5f0a4224c133c504d8b Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 19 Oct, 2018 1 commit
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Antonio Nino Diaz authored
Commit <ee1ba6d4 > ("Makefile: Support totally quiet output with -s") broke verbose (V=1) builds on Windows. This patch fixes it by adding helpers to silence echo prints in a OS-dependent way. Change-Id: I24669150457516e9fb34fa32fa103398efe8082d Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 18 Oct, 2018 8 commits
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Jerome Forissier authored
Since upstream QEMU commit 14ec3cbd7c1e ("device_tree: Increase FDT_MAX_SIZE to 1 MiB"), which is included in release v2.12.1 and later, BL2 initialization fails with the following error (-3 is -FDT_ERR_NOSPACE): ERROR: Invalid Device Tree at 0x40000000: error -3 Increase PLAT_QEMU_DT_MAX_SIZE accordingly. Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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Chandni Cherukuri authored
The default values of 'plat_css_scmi_plat_info' is not applicable for all the platforms. There should be a provision to let platform code to register a platform specific instance of scmi_channel_plat_info_t. Add a new API 'plat_css_get_scmi_info' which lets the platform to register a platform specific instance of scmi_channel_plat_info_t and remove the default values. In addition to this, the existing 'plat_css_scmi_plat_info' structure is removed from the common code and instantiated for the platforms that need it. This allows for a consistent provisioning of the SCMI channel information across all the existing and upcoming platforms. Change-Id: I4fb65d7f2f165b78697b4677f1e8d81edebeac06 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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Soby Mathew authored
Add MMC support for STM32MP1
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Soby Mathew authored
rcar_gen3: initial support
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Soby Mathew authored
Allow D-Cache to remain on during core power-down
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Soby Mathew authored
Optimize bakery locks when HW_ASSISTED_COHERENCY is enabled
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Soby Mathew authored
plat/arm: relocate the jump_if_cpu_midr macro.
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Soby Mathew authored
plat/arm: Small reorganization of platform code
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- 17 Oct, 2018 17 commits
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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Jorge Ramirez-Ortiz authored
Signed-off-by: ldts <jramirez@baylibre.com>
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Jorge Ramirez-Ortiz authored
- ddr - pfc [pin function controller] - qos [bandwidth] checkpatch.pl is generating too many errors.
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Jorge Ramirez-Ortiz authored
Reference code: ============== rar_gen3: IPL and Secure Monitor Rev1.0.22 https://github.com/renesas-rcar/arm-trusted-firmware [rcar_gen3] Author: Takuya Sakata <takuya.sakata.wz@bp.renesas.com> Date: Thu Aug 30 21:26:41 2018 +0900 Update IPL and Secure Monitor Rev1.0.22 General Information: =================== This port has been tested on the Salvator-X Soc_id r8a7795 revision ES1.1 (uses an SPD). Build Tested: ------------- ATFW_OPT="LSI=H3 RCAR_DRAM_SPLIT=1 RCAR_LOSSY_ENABLE=1" MBEDTLS_DIR=$mbedtls $ make clean bl2 bl31 rcar PLAT=rcar ${ATFW_OPT} SPD=opteed Other dependencies: ------------------ * mbed_tls: git@github.com:ARMmbed/mbedtls.git [devel] Merge: 68dbc94 f34a4c1 Author: Simon Butcher <simon.butcher@arm.com> Date: Thu Aug 30 00:57:28 2018 +0100 * optee_os: https://github.com/BayLibre/optee_os Until it gets merged into OP-TEE, the port requires Renesas' Trusted Environment with a modification to support power management. Author: Jorge Ramirez-Ortiz <jramirez@baylibre.com> Date: Thu Aug 30 16:49:49 2018 +0200 plat-rcar: cpu-suspend: handle the power level Signed-off-by: Jorge Ramirez-Ortiz <jramirez@baylibre.com> * u-boot: The port has beent tested using mainline uboot. Author: Fabio Estevam <festevam@gmail.com> Date: Tue Sep 4 10:23:12 2018 -0300 *linux: The port has beent tested using mainline kernel. Author: Linus Torvalds <torvalds@linux-foundation.org> Date: Sun Sep 16 11:52:37 2018 -0700 Linux 4.19-rc4 Overview --------- BOOTROM starts the cpu at EL3; In this port BL2 will therefore be entered at this exception level (the Renesas' ATF reference tree [1] resets into EL1 before entering BL2 - see its bl2.ld.S) BL2 initializes DDR (and i2c to talk to the PMIC on some platforms) before determining the boot reason (cold or warm). During suspend all CPUs are switched off and the DDR is put in backup mode (some kind of self-refresh mode). This means that BL2 is always entered in a cold boot scenario. Once BL2 boots, it determines the boot reason, writes it to shared memory (BOOT_KIND_BASE) together with the BL31 parameters (PARAMS_BASE) and jumps to BL31. To all effects, BL31 is as if it is being entered in reset mode since it still needs to initialize the rest of the cores; this is the reason behind using direct shared memory access to BOOT_KIND_BASE and PARAMS_BASE instead of using registers to get to those locations (see el3_common_macros.S and bl31_entrypoint.S for the RESET_TO_BL31 use case). Depending on the boot reason BL31 initializes the rest of the cores: in case of suspend, it uses a MBOX memory region to recover the program counters. [1] https://github.com/renesas-rcar/arm-trusted-firmware Tests ----- * cpuidle ------- enable kernel's cpuidle arm_idle driver and boot * system suspend -------------- $ cat suspend.sh #!/bin/bash i2cset -f -y 7 0x30 0x20 0x0F read -p "Switch off SW23 and press return " foo echo mem > /sys/power/state * cpu hotplug: ------------ $ cat offline.sh #!/bin/bash nbr=$1 echo 0 > /sys/devices/system/cpu/cpu$nbr/online printf "ONLINE: " && cat /sys/devices/system/cpu/online printf "OFFLINE: " && cat /sys/devices/system/cpu/offline $ cat online.sh #!/bin/bash nbr=$1 echo 1 > /sys/devices/system/cpu/cpu$nbr/online printf "ONLINE: " && cat /sys/devices/system/cpu/online printf "OFFLINE: " && cat /sys/devices/system/cpu/offline Signed-off-by: ldts <jramirez@baylibre.com>
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- 16 Oct, 2018 1 commit
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Andrew F. Davis authored
Leave the caches on and explicitly flush any data that may be stale when the core is powered down. This prevents non-coherent interconnect access which has negative side- effects on AM65x. Signed-off-by: Andrew F. Davis <afd@ti.com>
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