- 11 Oct, 2019 1 commit
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Paul Beesley authored
Tidying up a few Sphinx warnings that had built-up over time. None of these are critical but it cleans up the Sphinx output. At the same time, fixing some spelling errors that were detected. Change-Id: I38209e235481eed287f8008c6de9dedd6b12ab2e Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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- 09 Oct, 2019 4 commits
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Paul Beesley authored
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Paul Beesley authored
The readme.rst file in the project root is the front-page that is displayed on Github and if viewing the TF-A repository on git.trustedfirmware.org in the "about" view. It now contains a small amount of stub content, and directs readers to the ReadTheDocs documentation via trustedfirmware.org/docs/tf-a. The Github renderer is displaying the content fine but the cgit viewer displays some "backlink" errors because some content substitutions were left in place (terms surrounded by pipe symbols), e.g. |TF-A|. This patch removes those substitutions, that are not supported by cgit, and also updates one heading to clarify where to find the new docs. Change-Id: I358451df45b8c99975ba0b6db8ea61253a10560d Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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Paul Beesley authored
* changes: doc: Add guide for building the docs locally doc: De-duplicate readme and license files doc: Convert internal links to RST format
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Paul Beesley authored
This new page contains instructions for doing a local build of the documentation, plus information on the environment setup that needs to be done beforehand. Change-Id: If563145ab40639cabbe25d0f62759981a33692c6 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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- 08 Oct, 2019 5 commits
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Paul Beesley authored
The readme.rst and license.rst files in the project root overlap with the index.rst and license.rst files in the docs/ folder. We need to use the latter when building the documentation, as Sphinx requires all included files to be under a common root. However, the files in the root are currently used by the cgit and Github viewers. Using symlinks in Git presents some difficulties so the best course of action is likely to leave these files but in stub form. The license.rst file in the root will simply tell the reader to refer to docs/license.rst. The readme.rst file will contain a small amount of content that is derived from the docs/index.rst file, so that the Github main page will have something valid to show, but it will also contain a link to the full documentation on ReadTheDocs. Change-Id: I6dc46f08777e8d7ecb32ca7afc07a28486c9f77a Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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Paul Beesley authored
Currently links between documents are using the format: <path/to/><filename>.rst This was required for services like GitHub because they render each document in isolation - linking to another document is like linking to any other file, just provide the full path. However, with the new approach, the .rst files are only the raw source for the documents. Once the documents have been rendered the output is now in another format (HTML in our case) and so, when linking to another document, the link must point to the rendered version and not the .rst file. The RST spec provides a few methods for linking between content. The parent of this patch enabled the automatic creation of anchors for document titles - we will use these anchors as the targets for our links. Additional anchors can be added by hand if needed, on section and sub-section titles, for example. An example of this new format, for a document with the title "Firmware Design" is :ref:`Firmware Design`. One big advantage of this is that anchors are not dependent on paths. We can then move documents around, even between directories, without breaking any links between documents. Links will need to be updated only if the title of a document changes. Change-Id: I9e2340a61dd424cbd8fd1ecc2dc166f460d81703 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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Soby Mathew authored
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Soby Mathew authored
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Yann Gautier authored
The function has to use read_cntpct_el0() to update the counter, and not read_cntfrq_el0(). Change-Id: I9c676466e784c3122e9ffc2d87e66708797086e7 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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- 07 Oct, 2019 5 commits
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Paul Beesley authored
Add meson-g12a, qemu-sbsa and rpi4 to the documentation index so that they will have their docs rendered and integrated into the table of contents. Change-Id: Id972bf2fee67312dd7bff29f92bea67842e62431 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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Soby Mathew authored
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Soby Mathew authored
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Soby Mathew authored
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Petre-Ionut Tudor authored
Currently the MDCR_EL3 initialisation implicitly disables MDCR_EL3.SPME by using mov_imm. This patch makes the SPME bit more visible by explicitly disabling it and documenting its use in different versions of the architecture. Signed-off-by: Petre-Ionut Tudor <petre-ionut.tudor@arm.com> Change-Id: I221fdf314f01622f46ac5aa43388f59fa17a29b3
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- 04 Oct, 2019 3 commits
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laurenw-arm authored
Coherent I-cache is causing a prefetch violation where when the core executes an instruction that has recently been modified, the core might fetch a stale instruction which violates the ordering of instruction fetches. The workaround includes an instruction sequence to implementation defined registers to trap all EL0 IC IVAU instructions to EL3 and a trap handler to execute a TLB inner-shareable invalidation to an arbitrary address followed by a DSB. Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com> Change-Id: Ic3b7cbb11cf2eaf9005523ef5578a372593ae4d6
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Soby Mathew authored
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Soby Mathew authored
Make the spinlock implementation use ARMv8.1-LSE CAS instruction based on a platform build option. The CAS-based implementation used to be unconditionally selected for all ARM8.1+ platforms. The previous CAS spinlock implementation had a bug wherein the spin_unlock() implementation had an `sev` after `stlr` which is not sufficient. A dsb is needed to ensure that the stlr completes prior to the sev. Having a dsb is heavyweight and a better solution would be to use load exclusive semantics to monitor the lock and wake up from wfe when a store happens to the lock. The patch implements the same. Change-Id: I5283ce4a889376e4cc01d1b9d09afa8229a2e522 Signed-off-by: Soby Mathew <soby.mathew@arm.com> Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
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- 03 Oct, 2019 17 commits
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Lionel Debieve authored
Introduce timeout_init_us/timeout_elapsed() delay tracking with CNTPCT. timeout_init_us(some_timeout_us); returns a reference to detect timeout for the provided microsecond delay value from current time. timeout_elapsed(reference) return true/false whether the reference timeout is elapsed. Cherry picked from OP-TEE implementation [1]. [1] commit 33d30a74502b ("core: timeout detection support") Minor: - Remove stm32mp platform duplicated implementation. - Add new include in marvell ble.mk Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Change-Id: Iaef6d43c11a2e6992fb48efdc674a0552755ad9c
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Soby Mathew authored
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Alexei Fedorov authored
This patch adds support for ARMv8.3-PAuth in BL1 SMC calls and BL2U image for firmware updates by programming APIAKey_EL1 registers and enabling Pointer Authentication in EL3 and EL1 respectively. Change-Id: I875d952aba8242caf74fb5f4f2d2af6f0c768c08 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
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Soby Mathew authored
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Imre Kis authored
Change-Id: I1ea2bf088f1e001cdbd377cbfb7c6a2866af0422 Signed-off-by: Imre Kis <imre.kis@arm.com>
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Soby Mathew authored
* changes: gpio: stm32_gpio: do not mix error code types fdts: stm32mp1: move FDCAN to PLL4_R mmc: increase delay between ACMD41 retries crypto: stm32_hash: align stm32_hash_update() prototype
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Soby Mathew authored
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Soby Mathew authored
* changes: qemu/qemu_sbsa: Adding memory mapping for both FLASH0/FLASH1 qemu/qemu_sbsa: Adding Qemu SBSA platform
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Soby Mathew authored
* changes: mediatek: mt8183: add EMI MPU driver for DRAM protection mediatek: mt8183: add DEVAPC driver to control protection
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Soby Mathew authored
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Nicolas Le Bayon authored
Change-Id: I84f8a99be2dcdf7c51fbecdb324df8e2f32cc855 Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Antonio Borneo authored
LTDC modifies the clock frequency to adapt it to the display. Such frequency change is not detected by the FDCAN driver that instead caches the value at probe and pretends to use it later. This change fixes the issue by moving the FDCAN to PLL4_R, leaving the LTDC alone on PLL4_Q. Signed-off-by: Antonio Borneo <antonio.borneo@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I8230868b2b5fd6deb6e3f9dc3911030d8d484c58
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Yann Gautier authored
In the SD Specification, Power Up Diagram of Card figure, the Timeout value for initialization process (ACMD41 command retries) is 1 second. Align to match MMC cards (in mmc_send_op_cond()) and Linux kernel code, and set the delay between ACMD41 command retries to 10ms. Change-Id: I2e07cb9944e7d7b72f2d4b13e0505e6751458091 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Yann Gautier authored
Use size_t for length parameter in header file, as in .c file. Change-Id: I310f2a6159cde1c069b4f814f6558c2488c203ec Signed-off-by: Yann Gautier <yann.gautier@st.com>
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Usama Arif authored
a5ds only has always-on power domain and there is no power control present. However, without the pwr_domain_off handler, the kernel panics when the user will try to switch off secondary cores. The a5ds_pwr_domain_off handler will prevent kernel from crashing, i.e. the kernel will attempt but fail to shut down the secondary CPUs if the user tries to switch them offline. Change-Id: I3c2239a1b6f035113ddbdda063c8495000cbe30c Signed-off-by: Usama Arif <usama.arif@arm.com>
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kenny liang authored
Add EMI MPU driver for DRAM protection. Signed-off-by: kenny liang <kenny.liang@mediatek.com> Change-Id: I0355e084184b5396ad8ac99fff6ef9d050fb5e96
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kenny liang authored
Add DEVAPC driver to control protection. Signed-off-by: kenny liang <kenny.liang@mediatek.com> Change-Id: I6a6dd1c0bffa372b6df2cb604ca5e02eabbb9d26
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- 02 Oct, 2019 5 commits
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Soby Mathew authored
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Imre Kis authored
Change-Id: I645442d52a295706948e2cac88c36c1a3cb0bc47 Signed-off-by: Imre Kis <imre.kis@arm.com>
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Lionel Debieve authored
Add the missing flag for aarch32 XIP memory mode. It was previously added in aarch64 only. Minor: Correct the aarch64 missing flag. Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Change-Id: Iac0a7581a1fd580aececa75f97deb894858f776f
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Sandrine Bailleux authored
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Louis Mayencourt authored
Change-Id: I3b866e927d93f4b690aa4891940fc8afabf4146e Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
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