- 04 Jun, 2014 32 commits
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Sandrine Bailleux authored
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Sandrine Bailleux authored
It is easier to have all platform constants in the same place.
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Sandrine Bailleux authored
As for FVP platforms, Juno provides some LEDs that we can use to report exceptions during the early boot code.
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Sandrine Bailleux authored
Signed-off-by:
Ryan Harkin <ryan.harkin@linaro.org>
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Jon Medhurst authored
Signed-off-by:
Jon Medhurst <tixy@linaro.org>
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Ryan Harkin authored
BL30 needs an entry in the table in io_fip.c. I made it #ifdef'd so that ports that don't use a BL30 won't break. Signed-off-by:
Ryan Harkin <ryan.harkin@linaro.org>
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Ryan Harkin authored
Removing semihosting from the plat_io_storage code copied from FVP. Signed-off-by:
Ryan Harkin <ryan.harkin@linaro.org>
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Ryan Harkin authored
Juno has a "taped out" BL1. To run your own BL1 on the board, you have to place it in a "ROM bypass" address and configure the platform to boot from there. The agreed bypass address is an offset of 0x03EC0000 from the start of NOR flash (0x08000000), which equates to 0x0BEC0000. To run the model using a BL1 in bypass mode, you should use a parameter set something like this: <path to>/FVP_CSS_Juno3 \ -C css.aon.scp.ROMloader.fname=<SCP ROM filename> \ --data css.cluster1.cpu0=bl1.bin@0x0BEC0000 \ -C soc.scc.apps_alt_boot=0x0BEC0000 To build BL1 as a ROM located at address zero, you can over-ride the default value for TZROM_BASE by passing parameters to make, eg: ASFLAGS="-D TZROM_BASE=0x00000000" \ CFLAGS="-D TZROM_BASE=0x00000000" \ CROSS_COMPILE=aarch64-linux-gnu- \ make PLAT=juno DEBUG=1 all Then you can launch the model using a command such as: <path to>/FVP_CSS_Juno3 \ -C css.aon.scp.ROMloader.fname=<SCP ROM filename> \ -C css.trustedBootROMloader.fname=<path to>/bl1.bin \ Signed-off-by:
Ryan Harkin <ryan.harkin@linaro.org>
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Jon Medhurst authored
Currently UEFI and Linux are using SMC calls in the 'ARM Architecture' Owning Entity range so lets implement these to get things working. UEFI probably doesn't actually need to issue the ID_PRESENCE and ID_UID calls it does, and the device-tree used by Linux could specify the PSCI identifiers instead. After those changes, this patch isn't required. Signed-off-by:
Jon Medhurst <tixy@linaro.org>
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Jon Medhurst authored
This is a temporary solution for issue #20 Signed-off-by:
Jon Medhurst <tixy@linaro.org>
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Jon Medhurst authored
Signed-off-by:
Jon Medhurst <tixy@linaro.org>
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Jon Medhurst authored
Signed-off-by:
Jon Medhurst <tixy@linaro.org>
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Jon Medhurst authored
Signed-off-by:
Jon Medhurst <tixy@linaro.org>
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Jon Medhurst authored
Signed-off-by:
Jon Medhurst <tixy@linaro.org>
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Jon Medhurst authored
The SCP Ready command is sent by the SCP to indicate that the BL3-0 RAM Firmware image is successfully up and running. Signed-off-by:
Jon Medhurst <tixy@linaro.org>
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Jon Medhurst authored
Signed-off-by:
Jon Medhurst <tixy@linaro.org>
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Jon Medhurst authored
Signed-off-by:
Jon Medhurst <tixy@linaro.org>
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Jon Medhurst authored
Signed-off-by:
Jon Medhurst <tixy@linaro.org>
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Jon Medhurst authored
Signed-off-by:
Jon Medhurst <tixy@linaro.org>
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Jon Medhurst authored
Signed-off-by:
Jon Medhurst <tixy@linaro.org>
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Jon Medhurst authored
Signed-off-by:
Jon Medhurst <tixy@linaro.org>
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Jon Medhurst authored
Signed-off-by:
Jon Medhurst <tixy@linaro.org>
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Jon Medhurst authored
Note, on Juno mailboxes are 16 bytes because any bigger and they would overlap the memory used for MHU payload data for SCP->AP transfers. Signed-off-by:
Jon Medhurst <tixy@linaro.org>
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Jon Medhurst authored
Signed-off-by:
Jon Medhurst <tixy@linaro.org>
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Jon Medhurst authored
Signed-off-by:
Jon Medhurst <tixy@linaro.org>
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Jon Medhurst authored
Signed-off-by:
Jon Medhurst <tixy@linaro.org>
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Sandrine Bailleux authored
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Sandrine Bailleux authored
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Sandrine Bailleux authored
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Jon Medhurst authored
Juno doesn't have TZDRAM as FVP does, and there is real reason why we need a special memory region for bl31_args anyway, assuming we take care to copy it in BL31 before BL2's memory is reused. Signed-off-by:
Jon Medhurst <tixy@linaro.org>
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Jon Medhurst authored
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Jon Medhurst authored
Signed-off-by:
Jon Medhurst <tixy@linaro.org>
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- 03 Jun, 2014 8 commits
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Dan Handley authored
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Dan Handley authored
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Achin Gupta authored
This patch adds documentation that describes the design of the Interrupt management framework in the ARM Trusted Firmware. The porting-guide.md has also been updated to describe the interface that should be implemented by each platform to support this framework. Change-Id: I3eda48e5c9456e6a9516956bee16a29e366633b7 Co-Authored-By:
Soby Mathew <soby.mathew@arm.com>
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Dan Handley authored
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Dan Handley authored
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Dan Handley authored
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Vikram Kanigiri authored
Update documentation with BL3-1 hardening interface changes and for using BL3-1 as a reset vector feature Change-Id: Iafdd05e7a8e66503409f2acc934372efef5bc51b
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Dan Handley authored
Updates to readme.md and change-log.md to describe the features and changes in the v0.4 release. Change-Id: Ice0a7cf7abae349f552e662eac638a46acc5db3f
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