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rcar_gen3: initial support

Allow D-Cache to remain on during core power-down

Optimize bakery locks when HW_ASSISTED_COHERENCY is enabled

plat/arm: relocate the jump_if_cpu_midr macro.

plat/arm: Small reorganization of platform code

Signed-off-by: ldts <jramirez@baylibre.com>

Signed-off-by: ldts <jramirez@baylibre.com>

Signed-off-by: ldts <jramirez@baylibre.com>

Signed-off-by: ldts <jramirez@baylibre.com>

Signed-off-by: ldts <jramirez@baylibre.com>

Signed-off-by: ldts <jramirez@baylibre.com>

Signed-off-by: ldts <jramirez@baylibre.com>

Signed-off-by: ldts <jramirez@baylibre.com>

Signed-off-by: ldts <jramirez@baylibre.com>

Signed-off-by: ldts <jramirez@baylibre.com>

Signed-off-by: ldts <jramirez@baylibre.com>

Signed-off-by: ldts <jramirez@baylibre.com>

Signed-off-by: ldts <jramirez@baylibre.com>

Signed-off-by: ldts <jramirez@baylibre.com>

Signed-off-by: ldts <jramirez@baylibre.com>

 - ddr
 - pfc [pin function controller]
 - qos [bandwidth]

checkpatch.pl is generating too many errors.

Reference code:
==============

rar_gen3: IPL and Secure Monitor Rev1.0.22
https://github.com/renesas-rcar/arm-trusted-firmware [rcar_gen3]

Author: Takuya Sakata <takuya.sakata.wz@bp.renesas.com>
Date:   Thu Aug 30 21:26:41 2018 +0900
	Update IPL and Secure Monitor Rev1.0.22

General Information:
===================

This port has been tested on the Salvator-X Soc_id r8a7795 revision
ES1.1 (uses an SPD).

Build Tested:
-------------
ATFW_OPT="LSI=H3 RCAR_DRAM_SPLIT=1 RCAR_LOSSY_ENABLE=1"
MBEDTLS_DIR=$mbedtls

$ make clean bl2 bl31 rcar PLAT=rcar ${ATFW_OPT} SPD=opteed

Other dependencies:
------------------
* mbed_tls:
  git@github.com:ARMmbed/mbedtls.git [devel]

  Merge: 68dbc94 f34a4c1
  Author: Simon Butcher <simon.butcher@arm.com>
  Date:   Thu Aug 30 00:57:28 2018 +0100

* optee_os:
  https://github.com/BayLibre/optee_os

  Until it gets merged into OP-TEE, the port requires Renesas' Trusted
  Environment with a modification to support power manage...

Leave the caches on and explicitly flush any data that
may be stale when the core is powered down. This prevents
non-coherent interconnect access which has negative side-
effects on AM65x.
Signed-off-by: Andrew F. Davis <afd@ti.com>

When HW_ASSISTED_COHERENCY is enabled we can use spinlocks
instead of using the more complex and slower bakery algorithm.

Change-Id: I9d791a70050d599241169b9160a67e57d5506564
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

macro jump_if_cpu_midr is used commonly by many arm platform.
It has now been relocated to common place to remove duplication
of code.

Change-Id: Ic0876097dbc085df4f90eadb4b7687dde7c726da
Signed-off-by: Deepak Pandey <Deepak.Pandey@arm.com>

drivers: partition: correct compilation error in VERBOSE mode

Introduce object pool allocator

pl011: cnds: cbmem: 16550: Fix comments

The comments with the prototypes of the register functions of the
console drivers are incorrect. The arguments are wrong. This patch fixes
them.

Change-Id: I38c4b481ee69e840780111c42f03c0752eb6315c
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Makefile: Support totally quiet output with -s

plat/arm: Fix misra warnings in platform code

drivers: imx: mxc_usdhc: Do not set MMC_RSP_48 for MMC_RESPONSE_R2

PSCI cache flush and comment fixup

Change-Id: Ica944acc474a099219d50b041cfaeabd4f3d362f
Signed-off-by: Sathees Balya <sathees.balya@arm.com>

The object pool allocator provides a simplistic interface to manage
allocation in a fixed-size static array. The caller creates a static
"object pool" out of such an array and may then call pool_alloc() to
get the next available object within the pool. There is also a variant
to get multiple consecutive objects: pool_alloc_n().

Note that this interface does not provide any way to free the objects
afterwards. This is by design and it is not a limitation. We do not
want to introduce complexity induced by memory freeing, such as
use-after-free bugs, memory fragmentation and so on.

Change-Id: Iefc2e153767851fbde5841a295f92ae48adda71f
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

Signed-off-by: Yann Gautier <yann.gautier@st.com>

psci: platform control of SYSTEM_SUSPEND entry

This file is shared between FVP and all CSS platforms. While it may be
true that some definitions can be common, it doesn't make sense
conceptually. For example, the stack size depends on the platform and so
does the SRAM size.

After removing them, there are not enough common definitions to justify
having this header, so the other definitions have been moved to the
platform_def.h of FVP, board_css_def.h and arm_def.h.

Change-Id: Ifbf4b017227f9dfefa1a430f67d7d6baae6a4ba1
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Various corrections of typos

plat/arm: Move norflash driver to drivers/ folder